Change PE State changes one or more of the PSTATE.{A, I, F} interrupt mask bits and, optionally, the PSTATE.M mode field, without changing any other PSTATE bits.
CPS is treated as NOP if executed in User mode unless it is defined as being constrained unpredictable elsewhere in this section.
The PE checks whether the value being written to PSTATE.M is legal. See Illegal changes to PSTATE.M.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | imod | M | 0 | (0) | (0) | (0) | (0) | (0) | (0) | (0) | A | I | F | 0 | mode | |||||
if mode != '00000' && M == '0' then UNPREDICTABLE; if (imod<1> == '1' && A:I:F == '000') || (imod<1> == '0' && A:I:F != '000') then UNPREDICTABLE; constant enable = (imod == '10'); constant disable = (imod == '11'); constant changemode = (M == '1'); constant pemode = mode; constant affectA = (A == '1'); constant affectI = (I == '1'); constant affectF = (F == '1'); if (imod == '00' && M == '0') || imod == '01' then UNPREDICTABLE;
If imod == '01', then one of the following behaviors must occur:
If imod == '00' && M == '0', then one of the following behaviors must occur:
If mode != '00000' && M == '0', then one of the following behaviors must occur:
If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:
If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | im | (0) | A | I | F |
if A:I:F == '000' then UNPREDICTABLE; constant enable = (im == '0'); constant disable = (im == '1'); constant changemode = FALSE; constant affectA = (A == '1'); constant affectI = (I == '1'); constant affectF = (F == '1'); constant bits(5) pemode = bits(5) UNKNOWN; if InITBlock() then UNPREDICTABLE;
If A:I:F == '000', then one of the following behaviors must occur:
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | (1) | (1) | (1) | (1) | 1 | 0 | (0) | 0 | (0) | imod | M | A | I | F | mode | |||||
if imod == '00' && M == '0' then SEE "Hint instructions"; if mode != '00000' && M == '0' then UNPREDICTABLE; if (imod<1> == '1' && A:I:F == '000') || (imod<1> == '0' && A:I:F != '000') then UNPREDICTABLE; constant enable = (imod == '10'); constant disable = (imod == '11'); constant changemode = (M == '1'); constant pemode = mode; constant affectA = (A == '1'); constant affectI = (I == '1'); constant affectF = (F == '1'); if imod == '01' || InITBlock() then UNPREDICTABLE;
If imod == '01', then one of the following behaviors must occur:
If mode != '00000' && M == '0', then one of the following behaviors must occur:
If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:
If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:
Hint instructions: In encoding T2, if the imod field is 00 and the M bit is 0, a hint instruction is encoded. To determine which hint instruction, see Branches and miscellaneous control.
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
| <q> |
| <iflags> |
Is a sequence of one or more of the following, specifying which interrupt mask bits are affected:
|
| <mode> |
Is the number of the mode to change to, in the range 0 to 31, encoded in the "mode" field. |
if CurrentInstrSet() == InstrSet_A32 then EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; if affectI then PSTATE.I = '0'; if affectF then PSTATE.F = '0'; if disable then if affectA then PSTATE.A = '1'; if affectI then PSTATE.I = '1'; if affectF then PSTATE.F = '1'; if changemode then // AArch32.WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32.WriteModeByInstr(pemode); else EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; if affectI then PSTATE.I = '0'; if affectF then PSTATE.F = '0'; if disable then if affectA then PSTATE.A = '1'; if affectI then PSTATE.I = '1'; if affectF then PSTATE.F = '1'; if changemode then // AArch32.WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32.WriteModeByInstr(pemode);
Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05
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