ORN, ORNS (immediate)

Bitwise OR NOT (immediate) performs a bitwise (inclusive) OR of a register value and the complement of an immediate value, and writes the result to the destination register. It can optionally update the condition flags based on the result.

T1

15141312111098765432101514131211109876543210
11110i00011S!= 11110imm3Rdimm8
Rn

Flag setting (S == 1)

ORNS{<c>}{<q>} {<Rd>,} <Rn>, #<const>

Not flag setting (S == 0)

ORN{<c>}{<q>} {<Rd>,} <Rn>, #<const>

if Rn == '1111' then SEE "MVN (immediate)"; constant d = UInt(Rd); constant n = UInt(Rn); constant setflags = (S == '1'); constant a32 = FALSE; constant bits(12) imm = i:imm3:imm8; // Armv8-A removes UNPREDICTABLE for R13 if d == 15 then UNPREDICTABLE;

For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<c>

See Standard assembler syntax fields.

<q>

See Standard assembler syntax fields.

<Rd>

Is the general-purpose destination register, encoded in the "Rd" field. If omitted, this register is the same as <Rn>.

<Rn>

Is the general-purpose source register, encoded in the "Rn" field.

<const>

An immediate value. See Modified immediate constants in T32 instructions for the range of values.

Operation

if ConditionPassed() then EncodingSpecificOperations(); constant (imm32, carry) = (if a32 then A32ExpandImm_C(imm, PSTATE.C) else T32ExpandImm_C(imm, PSTATE.C)); constant result = R[n] OR NOT(imm32); R[d] = result; if setflags then PSTATE.N = result<31>; PSTATE.Z = IsZeroBit(result); PSTATE.C = carry; // PSTATE.V unchanged

Operational information

If CPSR.DIT is 1 and this instruction does not use R15 as either its source or destination:


Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05

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