PSSBB

Physical Speculative Store Bypass Barrier is a memory barrier that prevents speculative loads from bypassing earlier stores to the same physical address under certain conditions. For more information and details of the semantics, see Physical Speculative Store Bypass Barrier (PSSBB).

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

313029282726252423222120191817161514131211109876543210
111101010111(1)(1)(1)(1)(1)(1)(1)(1)(0)(0)(0)(0)01000100

A1

PSSBB{<q>}

// No additional decoding required

T1

15141312111098765432101514131211109876543210
111100111011(1)(1)(1)(1)10(0)0(1)(1)(1)(1)01000100

T1

PSSBB{<q>}

if InITBlock() then UNPREDICTABLE;

Assembler Symbols

<q>

See Standard assembler syntax fields.

Operation

if ConditionPassed() then EncodingSpecificOperations(); SpeculativeStoreBypassBarrierToPA();


Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05

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