Signed Divide divides a 32-bit signed integer register value by a 32-bit signed integer register value, and writes the result to the destination register. The condition flags are not affected.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| != 1111 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | Rd | (1) | (1) | (1) | (1) | Rm | 0 | 0 | 0 | 1 | Rn | ||||||||||||
| cond | Ra | ||||||||||||||||||||||||||||||
constant d = UInt(Rd); constant n = UInt(Rn); constant m = UInt(Rm); constant a = UInt(Ra); if d == 15 || n == 15 || m == 15 || a != 15 then UNPREDICTABLE;
If Ra != '1111', then one of the following behaviors must occur:
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | Rn | (1) | (1) | (1) | (1) | Rd | 1 | 1 | 1 | 1 | Rm | |||||||||
| Ra | |||||||||||||||||||||||||||||||
constant d = UInt(Rd); constant n = UInt(Rn); constant m = UInt(Rm); constant a = UInt(Ra); // Armv8-A removes UNPREDICTABLE for R13 if d == 15 || n == 15 || m == 15 || a != 15 then UNPREDICTABLE;
If Ra != '1111', then one of the following behaviors must occur:
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
| <c> |
| <q> |
| <Rd> |
Is the general-purpose destination register, encoded in the "Rd" field. |
| <Rn> |
Is the first general-purpose source register holding the dividend, encoded in the "Rn" field. |
| <Rm> |
Is the second general-purpose source register holding the divisor, encoded in the "Rm" field. |
Overflow
If the signed integer division 0x80000000 / 0xFFFFFFFF is performed, the pseudocode produces the intermediate integer result +231, that overflows the 32-bit signed integer range. No indication of this overflow case is produced, and the 32-bit result written to <Rd> must be the bottom 32 bits of the binary representation of +231. So the result of the division is 0x80000000.
if ConditionPassed() then EncodingSpecificOperations(); integer result; if SInt(R[m]) == 0 then result = 0; else result = RoundTowardsZero(Real(SInt(R[n])) / Real(SInt(R[m]))); R[d] = result<31:0>;
Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05
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