Set Endianness writes a new value to PSTATE.E.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | (0) | (0) | (0) | 1 | (0) | (0) | (0) | (0) | (0) | (0) | E | (0) | 0 | 0 | 0 | 0 | (0) | (0) | (0) | (0) |
constant set_bigend = (E == '1');
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | (1) | E | (0) | (0) | (0) |
constant set_bigend = (E == '1'); if InITBlock() then UNPREDICTABLE;
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
| <q> |
| <endian_specifier> |
Is the endianness to be selected, and the value to be set in PSTATE.E,
encoded in
|
EncodingSpecificOperations(); AArch32.CheckSETENDEnabled(); PSTATE.E = if set_bigend then '1' else '0';
Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05
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