Test (immediate) performs a bitwise AND operation on a register value and an immediate value. It updates the condition flags based on the result, and discards the result.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
!= 1111 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | Rn | (0) | (0) | (0) | (0) | imm12 | |||||||||||||||||
cond |
constant n = UInt(Rn); constant a32 = TRUE; constant bits(12) imm = imm12;
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 0 | i | 0 | 0 | 0 | 0 | 0 | 1 | Rn | 0 | imm3 | 1 | 1 | 1 | 1 | imm8 |
constant n = UInt(Rn); constant a32 = FALSE; constant bits(12) imm = i:imm3:imm8; // Armv8-A removes UNPREDICTABLE for R13 if n == 15 then UNPREDICTABLE;
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
<c> |
<q> |
<const> |
For encoding A1: an immediate value. See Modified immediate constants in A32 instructions for the range of values. |
For encoding T1: an immediate value. See Modified immediate constants in T32 instructions for the range of values. |
if ConditionPassed() then EncodingSpecificOperations(); constant (imm32, carry) = (if a32 then A32ExpandImm_C(imm, PSTATE.C) else T32ExpandImm_C(imm, PSTATE.C)); constant result = R[n] AND imm32; PSTATE.N = result<31>; PSTATE.Z = IsZeroBit(result); PSTATE.C = carry; // PSTATE.V unchanged
If CPSR.DIT is 1, this instruction has passed its condition execution check, and does not use R15 as either its source or destination:
Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05
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