USUB8

Unsigned Subtract 8 performs four 8-bit unsigned integer subtractions, and writes the results to the destination register. It sets PSTATE.GE according to the results of the subtractions.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

313029282726252423222120191817161514131211109876543210
!= 111101100101RnRd(1)(1)(1)(1)1111Rm
cond

A1

USUB8{<c>}{<q>} {<Rd>,} <Rn>, <Rm>

constant d = UInt(Rd); constant n = UInt(Rn); constant m = UInt(Rm); if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;

T1

15141312111098765432101514131211109876543210
111110101100Rn1111Rd0100Rm

T1

USUB8{<c>}{<q>} {<Rd>,} <Rn>, <Rm>

constant d = UInt(Rd); constant n = UInt(Rn); constant m = UInt(Rm); // Armv8-A removes UNPREDICTABLE for R13 if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;

For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<c>

See Standard assembler syntax fields.

<q>

See Standard assembler syntax fields.

<Rd>

Is the general-purpose destination register, encoded in the "Rd" field.

<Rn>

Is the first general-purpose source register, encoded in the "Rn" field.

<Rm>

Is the second general-purpose source register, encoded in the "Rm" field.

Operation

if ConditionPassed() then EncodingSpecificOperations(); constant diff1 = UInt(R[n]<7:0>) - UInt(R[m]<7:0>); constant diff2 = UInt(R[n]<15:8>) - UInt(R[m]<15:8>); constant diff3 = UInt(R[n]<23:16>) - UInt(R[m]<23:16>); constant diff4 = UInt(R[n]<31:24>) - UInt(R[m]<31:24>); R[d]<7:0> = diff1<7:0>; R[d]<15:8> = diff2<7:0>; R[d]<23:16> = diff3<7:0>; R[d]<31:24> = diff4<7:0>; PSTATE.GE<0> = if diff1 >= 0 then '1' else '0'; PSTATE.GE<1> = if diff2 >= 0 then '1' else '0'; PSTATE.GE<2> = if diff3 >= 0 then '1' else '0'; PSTATE.GE<3> = if diff4 >= 0 then '1' else '0';

Operational information

If CPSR.DIT is 1, this instruction has passed its condition execution check, and does not use R15 as either its source or destination:


Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05

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