VCVT (integer to floating-point, floating-point)

Convert integer to floating-point converts a 32-bit integer to floating-point using the rounding mode specified by the FPSCR, and places the result in a second register.

VCVT (between floating-point and fixed-point, floating-point) describes conversions between floating-point and 16-bit integers.

Depending on settings in the CPACR, NSACR, HCPTR, and FPEXC registers, and the Security state and PE mode in which the instruction is executed, an attempt to execute the instruction might be undefined, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

if opc2 != '000' && !(opc2 IN {'10x'}) then SEE "Related encodings"; if size == '00' || (size == '01' && !IsFeatureImplemented(FEAT_FP16)) then UNDEFINED; if size == '01' && cond != '1110' then UNPREDICTABLE; integer d; integer esize; integer m; boolean unsigned; FPRounding rounding; constant to_integer = (opc2<2> == '1'); boolean zero_rounding; if to_integer then unsigned = (opc2<0> == '0'); zero_rounding = (op == '1'); d = UInt(Vd:D); case size of when '01' esize = 16; m = UInt(Vm:M); when '10' esize = 32; m = UInt(Vm:M); when '11' esize = 64; m = UInt(M:Vm); else unsigned = (op == '0'); zero_rounding = FALSE; m = UInt(Vm:M); case size of when '01' esize = 16; d = UInt(Vd:D); when '10' esize = 32; d = UInt(Vd:D); when '11' esize = 64; d = UInt(D:Vd);

CONSTRAINED UNPREDICTABLE behavior

If size == '01' && cond != '1110', then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as if it passes the Condition code check.
• The instruction executes as NOP. This means it behaves as if it fails the Condition code check.

T1

if opc2 != '000' && !(opc2 IN {'10x'}) then SEE "Related encodings"; if size == '00' || (size == '01' && !IsFeatureImplemented(FEAT_FP16)) then UNDEFINED; if size == '01' && InITBlock() then UNPREDICTABLE; integer esize; integer m; integer d; boolean unsigned; FPRounding rounding; boolean zero_rounding; constant to_integer = (opc2<2> == '1'); if to_integer then unsigned = (opc2<0> == '0'); zero_rounding = (op == '1'); d = UInt(Vd:D); case size of when '01' esize = 16; m = UInt(Vm:M); when '10' esize = 32; m = UInt(Vm:M); when '11' esize = 64; m = UInt(M:Vm); else unsigned = (op == '0'); zero_rounding = FALSE; m = UInt(Vm:M); case size of when '01' esize = 16; d = UInt(Vd:D); when '10' esize = 32; d = UInt(Vd:D); when '11' esize = 64; d = UInt(D:Vd);

CONSTRAINED UNPREDICTABLE behavior

If size == '01' && InITBlock(), then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as if it passes the Condition code check.
• The instruction executes as NOP. This means it behaves as if it fails the Condition code check.

Assembler Symbols