The AMPIDR3 characteristics are:
Provides information to identify an activity monitors component.
For more information, see 'About the Peripheral identification scheme'.
It is IMPLEMENTATION DEFINED whether AMPIDR3 is implemented in the Core power domain or in the Debug power domain.
This register is present only when FEAT_AMUv1 is implemented and an implementation implements AMPIDR3. Otherwise, direct accesses to AMPIDR3 are RES0.
AMPIDR3 is a 32-bit register.
This register is part of the AMU block.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | REVAND | CMOD |
Reserved, RES0.
Part minor revision. Parts using AMU.AMPIDR2.REVISION as an extension to the Part number must use this field as a major revision number.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Customer modified. Indicates someone other than the Designer has modified the component.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Accesses to this register use the following encodings:
Accessible at offset 0xFEC from AMU
Accesses on this interface are RO.
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