The CNTCV characteristics are:
Indicates the current count value.
It is IMPLEMENTATION DEFINED whether CNTCV is implemented in the Core power domain or in the Debug power domain.
For more information, see 'Power and reset domains for the system level implementation of the Generic Timer'.
CNTCV is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CountValue | |||||||||||||||||||||||||||||||
CountValue |
Indicates the counter value.
The reset behavior of this field is:
Frame | Accessibility |
---|---|
CNTControlBase | RW |
CNTReadBase | RO |
A write to CNTCV must be visible in the CNTPCT register of each running processor in a finite time.
For the instance of the register in the CNTControlBase frame:
For the instance of the register in the CNTReadBase frame, this register is accessible in all physical address spaces.
In an implementation that supports 64-bit atomic memory accesses, this register must be accessible using a 64-bit atomic access.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTControlBase | 0x008 | CNTCV | 63:0 |
Accesses to this register are RW.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTReadBase | 0x000 | CNTCV | 63:0 |
Accesses to this register are RO.
15/12/2024 22:27; 5e0a212688c6bd7aee92394b6f5e491b4d0fee1d
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