The GICC_IIDR characteristics are:
Provides information about the implementer and revision of the CPU interface.
This register is present only when FEAT_GICv3_LEGACY is implemented. Otherwise, direct accesses to GICC_IIDR are RES0.
GICC_IIDR is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ProductID | Architecture_version | Revision | Implementer | ||||||||||||||||||||||||||||
Product Identifier.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
The version of the GIC architecture that is implemented.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| Architecture_version | Meaning |
|---|---|
| 0b0001 |
GICv1. |
| 0b0010 |
GICv2. |
| 0b0011 |
FEAT_GICv3 memory-mapped interface supported. Support for the System register interface is discoverable from PE registers ID_PFR1 and ID_AA64PFR0_EL1. |
| 0b0100 |
FEAT_GICv4 memory-mapped interface supported. Support for the System register interface is discoverable from PE registers ID_PFR1 and ID_AA64PFR0_EL1. |
Other values are reserved.
Access to this field is RO.
Revision number for the CPU interface.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Contains the JEP106 manufacturer's identification code of the designer of the CPU interface.
The code identifies the designer of the component, which might not be the same as the implementer of the device containing the component.
Zero is not a valid JEP106 identification code, meaning a value of zero for GICC_IIDR indicates this register is not implemented.
For an implementation designed by Arm, this field reads as 0x43B.
Bits [11:8] contain the JEP106 bank identifier of the designer minus 1.
Bit 7 is RES0.
Bits [6:0] contain bits [6:0] of the JEP106 manufacturer's identification code of the designer.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
| Component | Offset | Instance |
|---|---|---|
| GIC CPU interface | 0x00FC | GICC_IIDR |
Accessible as follows:
15/12/2024 22:27; 5e0a212688c6bd7aee92394b6f5e491b4d0fee1d
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