The GICM_TYPER characteristics are:
Provides information about what features the GIC implementation supports.
This register is available in all configurations of the GIC. When GICD_CTLR.DS==0, this register is Common.
GICM_TYPER is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Valid | CLR | SR | INTID | RES0 | NumSPIs | ||||||||||||||||||||||||||
Reports whether GICM_TYPER content is valid.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| Valid | Meaning |
|---|---|
| 0b0 |
GICM_TYPER reports no information on the capabilities of the GICM frame, all other fields are RES0. |
| 0b1 |
GICM_TYPER reports information on capabilities of GICM frame. |
Access to this field is RO.
Reports whether MSI clear registers are supported.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| CLR | Meaning |
|---|---|
| 0b0 |
MSI clear registers not implemented. |
| 0b1 |
MSI clear registers implemented. |
Access to this field is RO.
Reports whether Secure aliases of MSI registers are supported.
The value of this field is an IMPLEMENTATION DEFINED choice of:
| SR | Meaning |
|---|---|
| 0b0 |
Secure aliases of MSI registers not implemented. |
| 0b1 |
Secure aliases of MSI registers implemented. |
Access to this field is RO.
INTID of the first SPI assigned to this GICM frame.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Reserved, RES0.
Number of SPIs assigned to this GICM frame.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
| Component | Frame | Offset | Instance |
|---|---|---|---|
| GIC Distributor | MSI_base | 0x0004 | GICM_TYPER |
Accesses to this register are RO.
15/12/2024 22:27; 5e0a212688c6bd7aee92394b6f5e491b4d0fee1d
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