MPAMCFG_OUT_TL_MASK, MPAM Egress PARTID Translation Mask Configuration Register

The MPAMCFG_OUT_TL_MASK characteristics are:

Purpose

Configures the mask value used to compute translation PARTIDs for egress PARTIDs that do not have direct translation.

Configuration

The power domain of MPAMCFG_OUT_TL_MASK is IMPLEMENTATION DEFINED.

This register is present only when FEAT_MPAM_MSC_DOMAINS is implemented, MPAMF_IDR.HAS_OUT_TL == 1, and MPAMF_OUT_TL_IDR.HAS_BASE_MASK == 1. Otherwise, direct accesses to MPAMCFG_OUT_TL_MASK are RES0.

The power and reset domain of each MSC component is specific to that component.

Attributes

MPAMCFG_OUT_TL_MASK is a 32-bit register.

Field descriptions

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
RES0																											MASK_WD

Bits [31:5]

Reserved, RES0.

MASK_WD, bits [4:0]

Value used to calculate the mask as 2^MASK_WD-1. The mask is then used to compute the egress translation of PARTIDs that do not have a direct translation configured.

Accessing MPAMCFG_OUT_TL_MASK

This register is within the MPAM feature page memory frames.

In a system that supports Secure, Non-secure, Root, and Realm memory maps, there must be MPAM feature pages in all four address maps:

MPAMCFG_OUT_TL_MASK_s must only be accessible from the Secure MPAM feature page.
MPAMCFG_OUT_TL_MASK_ns must only be accessible from the Non-secure MPAM feature page.
MPAMCFG_OUT_TL_MASK_rt must only be accessible from the Root MPAM feature page.
MPAMCFG_OUT_TL_MASK_rl must only be accessible from the Realm MPAM feature page.

MPAMCFG_OUT_TL_MASK_s, MPAMCFG_OUT_TL_MASK_ns, MPAMCFG_OUT_TL_MASK_rt, and MPAMCFG_OUT_TL_MASK_rl must be separate registers:

The Secure instance (MPAMCFG_OUT_TL_MASK_s) accesses the egress PARTID translation mask used for Secure PARTIDs.
The Non-secure instance (MPAMCFG_OUT_TL_MASK_ns) accesses the egress PARTID translation mask used for Non-secure PARTIDs.
The Root instance (MPAMCFG_OUT_TL_MASK_rt) accesses the egress PARTID translation mask used for Root PARTIDs.
The Realm instance (MPAMCFG_OUT_TL_MASK_rl) accesses the egress PARTID translation mask used for Realm PARTIDs.

When RIS is implemented, loads and stores to MPAMCFG_OUT_TL_MASK access the egress PARTID translation mask configuration settings without being affected by MPAMCFG_PART_SEL.RIS.

MPAMCFG_OUT_TL_MASK can be accessed through the memory-mapped interfaces:

Component	Frame	Offset	Instance
MPAM	MPAMF_BASE_s	0x3218	MPAMCFG_OUT_TL_MASK_s

Accesses to this register are RW.

Component	Frame	Offset	Instance
MPAM	MPAMF_BASE_ns	0x3218	MPAMCFG_OUT_TL_MASK_ns

Accesses to this register are RW.

Component	Frame	Offset	Instance
MPAM	MPAMF_BASE_rt	0x3218	MPAMCFG_OUT_TL_MASK_rt

When FEAT_RME is implemented, accesses to this register are RW.

Component	Frame	Offset	Instance
MPAM	MPAMF_BASE_rl	0x3218	MPAMCFG_OUT_TL_MASK_rl

When FEAT_RME is implemented, accesses to this register are RW.

15/12/2024 22:27; 5e0a212688c6bd7aee92394b6f5e491b4d0fee1d