Lines Matching refs:r11
56 addi r11,r3,16 /* use r11 to keep dest address on r3. */
70 add r11,r3,r9 /* use r11 to keep dest address on r3. */
81 stxvl 32+v0,r11,r6
84 add r11,r11,r9
99 addi r10,r11,64
106 stxv 32+v0,0(r11)
107 stxv 32+v1,16(r11)
108 stxv 32+v2,32(r11)
109 stxv 32+v3,48(r11)
112 addi r11,r11,128
139 stxv 32+v0,0(r11)
140 stxv 32+v1,16(r11)
141 stxv 32+v2,32(r11)
142 stxv 32+v3,48(r11)
145 addi r11,r11,64
165 stxv 32+v2,32(r11)
167 stxv 32+v1,16(r11)
169 stxv 32+v0,0(r11)
172 add r11,r11,r8
177 stxvl v4,r11,r6
182 add r11,r3,r5
197 clrldi. r9,r11,60
200 sub r11,r11,r9
203 stxvl 32+v0,r11,r6
216 addi r10,r11,-64
223 stxv 32+v0,-16(r11)
224 stxv 32+v1,-32(r11)
225 stxv 32+v2,-48(r11)
226 stxv 32+v3,-64(r11)
229 addi r11,r11,-128
252 addi r11,r11,-64
259 stxv 32+v0,0(r11)
260 stxv 32+v1,16(r11)
261 stxv 32+v2,32(r11)
262 stxv 32+v3,48(r11)
283 stxv 32+v0,-48(r11)
285 stxv 32+v1,-32(r11)
287 stxv 32+v2,-16(r11)
289 sub r11,r11,r5
293 stxvl v4,r11,r6
300 sub r11,r11,r5
303 stxvl v4,r11,r6