Lines Matching refs:r6
76 mr r6,r3 /* Don't modify r3 since we need to return it. */
84 stxvl v0+32,r6,r9 /* Store up to 15B until aligned address. */
86 add r6,r6,r7
109 stxv v0+32,0(r6)
110 stxv v0+32,16(r6)
111 stxv v0+32,32(r6)
112 stxv v0+32,48(r6)
113 stxv v0+32,64(r6)
114 stxv v0+32,80(r6)
115 stxv v0+32,96(r6)
116 stxv v0+32,112(r6)
117 addi r6,r6,128
132 stxv v0+32,0(r6)
133 stxv v0+32,16(r6)
134 stxv v0+32,32(r6)
135 stxv v0+32,48(r6)
136 addi r6,r6,64
145 addi r10,r6,16
150 stxvl v0+32,r6,r5
156 addi r9,r6,32
157 addi r10,r6,48
175 neg r0,r6
185 stxv v0+32,0(r6)
186 stxv v0+32,16(r6)
187 stxv v0+32,32(r6)
188 stxv v0+32,48(r6)
189 addi r6,r6,64
192 stxv v0+32,0(r6)
193 stxv v0+32,16(r6)
194 addi r6,r6,32
197 stxv v0+32,0(r6)
198 addi r6,r6,16
214 dcbz 0,r6
215 dcbz r9,r6
216 dcbz r10,r6
217 dcbz r11,r6
218 addi r6,r6,512
233 dcbz 0,r6
234 dcbz r9,r6
235 addi r6,r6,256
238 dcbz 0,r6
239 addi r6,r6,128