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/sysdeps/ia64/fpu/
A Dlibm_reduce.S564 GR_BASE = r43 define
768 ld8 GR_BASE = [GR_BASE]
803 add GR_BASE = 8,GR_BASE // To effectively add 1 to SEGMENT
815 shladd GR_BASE = GR_SEGMENT,3,GR_BASE
839 ld8 GR_A = [GR_BASE],8
856 ld8 GR_B = [GR_BASE],8
862 ld8 GR_C = [GR_BASE],8
871 ld8 GR_D = [GR_BASE],8
878 ld8 GR_E = [GR_BASE],-40
1105 ld8 GR_BASE = [GR_BASE]
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