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Searched refs:load_misaligned_vmx_lo_loaded (Results 1 – 2 of 2) sorted by relevance

/sysdeps/powerpc/powerpc64/
A D__longjmp-common.S70 # define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \ macro
74 load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6)
75 load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5)
76 load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6)
77 load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5)
78 load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6)
79 load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5)
80 load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6)
81 load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5)
82 load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6)
[all …]
/sysdeps/powerpc/powerpc32/fpu/
A D__longjmp-common.S71 # define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \ macro
75 load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6)
76 load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5)
77 load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6)
78 load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5)
79 load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6)
80 load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5)
81 load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6)
82 load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5)
83 load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6)
[all …]

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