Lines Matching refs:b1
220 - SCR_EL3.HCE (bit 8) must be initialised to 0b1.
225 - ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1.
226 - ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1.
233 - ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1
234 - ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.
255 - SCR_EL3.APK (bit 16) must be initialised to 0b1
256 - SCR_EL3.API (bit 17) must be initialised to 0b1
260 - HCR_EL2.APK (bit 40) must be initialised to 0b1
261 - HCR_EL2.API (bit 41) must be initialised to 0b1
271 having 0b1 set for the corresponding bit for each of the auxiliary
278 having 0b1 set for the corresponding bit for each of the auxiliary
285 - SCR_EL3.FGTEn (bit 27) must be initialised to 0b1.
291 - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.
307 - CPTR_EL3.EZ (bit 8) must be initialised to 0b1.
325 - CPTR_EL3.ESM (bit 12) must be initialised to 0b1.
327 - SCR_EL3.EnTP2 (bit 41) must be initialised to 0b1.
338 - SCTLR_EL2.EnTP2 (bit 60) must be initialised to 0b1.
347 - SMCR_EL3.FA64 (bit 31) must be initialised to 0b1.
351 - SMCR_EL2.FA64 (bit 31) must be initialised to 0b1.