Lines Matching refs:clock
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
13 Qualcomm global clock control module which supports the clocks, resets and
17 - dt-bindings/clock/qcom,gcc-sm8350.h
26 - description: Sleep clock source
27 - description: PLL test clock source (Optional clock)
28 - description: PCIE 0 Pipe clock source (Optional clock)
29 - description: PCIE 1 Pipe clock source (Optional clock)
30 - description: UFS card Rx symbol 0 clock source (Optional clock)
31 - description: UFS card Rx symbol 1 clock source (Optional clock)
32 - description: UFS card Tx symbol 0 clock source (Optional clock)
33 - description: UFS phy Rx symbol 0 clock source (Optional clock)
34 - description: UFS phy Rx symbol 1 clock source (Optional clock)
35 - description: UFS phy Tx symbol 0 clock source (Optional clock)
36 - description: USB3 phy wrapper pipe clock source (Optional clock)
37 - description: USB3 phy sec pipe clock source (Optional clock)
40 clock-names:
44 - const: core_bi_pll_test_se # Optional clock
45 - const: pcie_0_pipe_clk # Optional clock
46 - const: pcie_1_pipe_clk # Optional clock
47 - const: ufs_card_rx_symbol_0_clk # Optional clock
48 - const: ufs_card_rx_symbol_1_clk # Optional clock
49 - const: ufs_card_tx_symbol_0_clk # Optional clock
50 - const: ufs_phy_rx_symbol_0_clk # Optional clock
51 - const: ufs_phy_rx_symbol_1_clk # Optional clock
52 - const: ufs_phy_tx_symbol_0_clk # Optional clock
53 - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
54 - const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock
57 '#clock-cells':
72 - clock-names
74 - '#clock-cells'
82 #include <dt-bindings/clock/qcom,rpmh.h>
83 clock-controller@100000 {
88 clock-names = "bi_tcxo", "sleep_clk";
89 #clock-cells = <1>;