Lines Matching refs:GIC
13 ARM SMP cores are often associated with a GIC, providing per processor
17 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
87 the 8 possible cpus attached to the GIC. A bit set to '1' indicated
96 Specifies base physical address(s) and size of the GIC registers. The
97 first region is the GIC distributor register base and size. The 2nd region
98 is the GIC cpu interface register base and size.
102 registers. The first additional region is the GIC virtual interface
103 control register base and size. The 2nd additional region is the GIC
112 secondary GICs, or VGIC maintenance interrupt on primary GIC (see
118 regions, used when the GIC doesn't have banked registers. The offset
127 description: List of names for the GIC clock input(s). Valid clock names
128 depend on the GIC variant.
154 Certain revisions of GIC-400 supports MSI/MSI-x via V2M register frame(s).