Lines Matching refs:interrupt
5 responsible for collecting all wired-interrupt sources in the CP and
6 communicating them to the GIC in the AP, the unit translates interrupt
17 Subnodes: Each group of interrupt is declared as a subnode of the ICU,
28 - #interrupt-cells: Specifies the number of cells needed to encode an
29 interrupt source. The value shall be 2.
31 The 1st cell is the index of the interrupt in the ICU unit.
33 The 2nd cell is the type of the interrupt. See arm,gic.txt for
36 - interrupt-controller: Identifies the node as an interrupt
48 icu: interrupt-controller@1e0000 {
52 CP110_LABEL(icu_nsr): interrupt-controller@10 {
55 #interrupt-cells = <2>;
56 interrupt-controller;
60 CP110_LABEL(icu_sei): interrupt-controller@50 {
63 #interrupt-cells = <2>;
64 interrupt-controller;
70 interrupt-parent = <&icu_nsr>;
75 interrupt-parent = <&icu_sei>;
81 interrupt-parent = <&icu_nsr>;
87 - #interrupt-cells: The value was 3.
88 The 1st cell was the group type of the ICU interrupt. Possible
90 ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure
91 ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure
92 ICU_GRP_SEI (0x4) : System error interrupt
93 ICU_GRP_REI (0x5) : RAM error interrupt
94 The 2nd cell was the index of the interrupt in the ICU unit.
95 The 3rd cell was the type of the interrupt. See arm,gic.txt for
100 icu: interrupt-controller@1e0000 {
104 #interrupt-cells = <3>;
105 interrupt-controller;
110 interrupt-parent = <&icu>;