Lines Matching refs:as
68 array is defined as <PDMIN1 PDMIN2 PDMIN3 PDMIN4>.
90 The array is defined as <GPI1 GPI2 GPI3 GPI4>.
93 1 - GPIX is configured as a general-purpose input (GPI)
94 2 - GPIX is configured as a master clock input (MCLK)
95 3 - GPIX is configured as an ASI input for daisy-chain (SDIN)
96 4 - GPIX is configured as a PDM data input for channel 1 and channel
98 5 - GPIX is configured as a PDM data input for channel 3 and channel
100 6 - GPIX is configured as a PDM data input for channel 5 and channel
102 7 - GPIX is configured as a PDM data input for channel 7 and channel
125 The array is defined as <GPO_CFG GPO_DRV>
130 1 - GPOX is configured as a general-purpose output (GPO)
131 2 - GPOX is configured as a device interrupt output (IRQ)
132 3 - GPOX is configured as a secondary ASI output (SDOUT2)
133 4 - GPOX is configured as a PDM clock output (PDMCLK)
149 type. The array is defined as <GPIO1_CFG GPIO1_DRV>
153 1 - GPIO1 is configured as a general-purpose output (GPO)
154 2 - (default) GPIO1 is configured as a device interrupt output (IRQ)
155 3 - GPIO1 is configured as a secondary ASI output (SDOUT2)
156 4 - GPIO1 is configured as a PDM clock output (PDMCLK)
157 8 - GPIO1 is configured as an input to control when MICBIAS turns on or
159 9 - GPIO1 is configured as a general-purpose input (GPI)
160 10 - GPIO1 is configured as a master clock input (MCLK)
161 11 - GPIO1 is configured as an ASI input for daisy-chain (SDIN)
162 12 - GPIO1 is configured as a PDM data input for channel 1 and channel 2
164 13 - GPIO1 is configured as a PDM data input for channel 3 and channel 4
166 14 - GPIO1 is configured as a PDM data input for channel 5 and channel 6
168 15 - GPIO1 is configured as a PDM data input for channel 7 and channel 8