Lines Matching refs:DM365
67 MUX_CFG(DM365, MMCSD0, 0, 24, 1, 0, false)
69 MUX_CFG(DM365, SD1_CLK, 0, 16, 3, 1, false)
70 MUX_CFG(DM365, SD1_CMD, 4, 30, 3, 1, false)
71 MUX_CFG(DM365, SD1_DATA3, 4, 28, 3, 1, false)
72 MUX_CFG(DM365, SD1_DATA2, 4, 26, 3, 1, false)
73 MUX_CFG(DM365, SD1_DATA1, 4, 24, 3, 1, false)
74 MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false)
76 MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false)
77 MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false)
79 MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false)
80 MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false)
81 MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false)
82 MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false)
83 MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false)
84 MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false)
85 MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false)
86 MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false)
88 MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false)
89 MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false)
90 MUX_CFG(DM365, MCBSP0_BFSX, 0, 21, 1, 1, false)
91 MUX_CFG(DM365, MCBSP0_BDR, 0, 20, 1, 1, false)
92 MUX_CFG(DM365, MCBSP0_R, 0, 19, 1, 1, false)
93 MUX_CFG(DM365, MCBSP0_BFSR, 0, 18, 1, 1, false)
95 MUX_CFG(DM365, SPI0_SCLK, 3, 28, 1, 1, false)
96 MUX_CFG(DM365, SPI0_SDI, 3, 26, 3, 1, false)
97 MUX_CFG(DM365, SPI0_SDO, 3, 25, 1, 1, false)
98 MUX_CFG(DM365, SPI0_SDENA0, 3, 29, 3, 1, false)
99 MUX_CFG(DM365, SPI0_SDENA1, 3, 26, 3, 2, false)
101 MUX_CFG(DM365, UART0_RXD, 3, 20, 1, 1, false)
102 MUX_CFG(DM365, UART0_TXD, 3, 19, 1, 1, false)
103 MUX_CFG(DM365, UART1_RXD, 3, 17, 3, 2, false)
104 MUX_CFG(DM365, UART1_TXD, 3, 15, 3, 2, false)
105 MUX_CFG(DM365, UART1_RTS, 3, 23, 3, 1, false)
106 MUX_CFG(DM365, UART1_CTS, 3, 21, 3, 1, false)
108 MUX_CFG(DM365, EMAC_TX_EN, 3, 17, 3, 1, false)
109 MUX_CFG(DM365, EMAC_TX_CLK, 3, 15, 3, 1, false)
110 MUX_CFG(DM365, EMAC_COL, 3, 14, 1, 1, false)
111 MUX_CFG(DM365, EMAC_TXD3, 3, 13, 1, 1, false)
112 MUX_CFG(DM365, EMAC_TXD2, 3, 12, 1, 1, false)
113 MUX_CFG(DM365, EMAC_TXD1, 3, 11, 1, 1, false)
114 MUX_CFG(DM365, EMAC_TXD0, 3, 10, 1, 1, false)
115 MUX_CFG(DM365, EMAC_RXD3, 3, 9, 1, 1, false)
116 MUX_CFG(DM365, EMAC_RXD2, 3, 8, 1, 1, false)
117 MUX_CFG(DM365, EMAC_RXD1, 3, 7, 1, 1, false)
118 MUX_CFG(DM365, EMAC_RXD0, 3, 6, 1, 1, false)
119 MUX_CFG(DM365, EMAC_RX_CLK, 3, 5, 1, 1, false)
120 MUX_CFG(DM365, EMAC_RX_DV, 3, 4, 1, 1, false)
121 MUX_CFG(DM365, EMAC_RX_ER, 3, 3, 1, 1, false)
122 MUX_CFG(DM365, EMAC_CRS, 3, 2, 1, 1, false)
123 MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false)
124 MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false)
126 MUX_CFG(DM365, KEYSCAN, 2, 0, 0x3f, 0x3f, false)
128 MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false)
129 MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false)
130 MUX_CFG(DM365, PWM1, 1, 2, 3, 2, false)
131 MUX_CFG(DM365, PWM1_G25, 3, 29, 3, 2, false)
132 MUX_CFG(DM365, PWM2_G87, 1, 10, 3, 2, false)
133 MUX_CFG(DM365, PWM2_G88, 1, 8, 3, 2, false)
134 MUX_CFG(DM365, PWM2_G89, 1, 6, 3, 2, false)
135 MUX_CFG(DM365, PWM2_G90, 1, 4, 3, 2, false)
136 MUX_CFG(DM365, PWM3_G80, 1, 20, 3, 3, false)
137 MUX_CFG(DM365, PWM3_G81, 1, 18, 3, 3, false)
138 MUX_CFG(DM365, PWM3_G85, 1, 14, 3, 2, false)
139 MUX_CFG(DM365, PWM3_G86, 1, 12, 3, 2, false)
141 MUX_CFG(DM365, SPI1_SCLK, 4, 2, 3, 1, false)
142 MUX_CFG(DM365, SPI1_SDI, 3, 31, 1, 1, false)
143 MUX_CFG(DM365, SPI1_SDO, 4, 0, 3, 1, false)
144 MUX_CFG(DM365, SPI1_SDENA0, 4, 4, 3, 1, false)
145 MUX_CFG(DM365, SPI1_SDENA1, 4, 0, 3, 2, false)
147 MUX_CFG(DM365, SPI2_SCLK, 4, 10, 3, 1, false)
148 MUX_CFG(DM365, SPI2_SDI, 4, 6, 3, 1, false)
149 MUX_CFG(DM365, SPI2_SDO, 4, 8, 3, 1, false)
150 MUX_CFG(DM365, SPI2_SDENA0, 4, 12, 3, 1, false)
151 MUX_CFG(DM365, SPI2_SDENA1, 4, 8, 3, 2, false)
153 MUX_CFG(DM365, SPI3_SCLK, 0, 0, 3, 2, false)
154 MUX_CFG(DM365, SPI3_SDI, 0, 2, 3, 2, false)
155 MUX_CFG(DM365, SPI3_SDO, 0, 6, 3, 2, false)
156 MUX_CFG(DM365, SPI3_SDENA0, 0, 4, 3, 2, false)
157 MUX_CFG(DM365, SPI3_SDENA1, 0, 6, 3, 3, false)
159 MUX_CFG(DM365, SPI4_SCLK, 4, 18, 3, 1, false)
160 MUX_CFG(DM365, SPI4_SDI, 4, 14, 3, 1, false)
161 MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false)
162 MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false)
163 MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false)
165 MUX_CFG(DM365, CLKOUT0, 4, 20, 3, 3, false)
166 MUX_CFG(DM365, CLKOUT1, 4, 16, 3, 3, false)
167 MUX_CFG(DM365, CLKOUT2, 4, 8, 3, 3, false)
169 MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false)
170 MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false)
171 MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false)
172 MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false)
173 MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false)
174 MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false)
175 MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false)
177 MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false)
178 MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false)
179 MUX_CFG(DM365, VOUT_HVSYNC, 1, 16, 1, 0, false)
180 MUX_CFG(DM365, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false)
181 MUX_CFG(DM365, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false)
182 MUX_CFG(DM365, VIN_CAM_WEN, 0, 14, 3, 0, false)
183 MUX_CFG(DM365, VIN_CAM_VD, 0, 13, 1, 0, false)
184 MUX_CFG(DM365, VIN_CAM_HD, 0, 12, 1, 0, false)
185 MUX_CFG(DM365, VIN_YIN4_7_EN, 0, 0, 0xff, 0, false)
186 MUX_CFG(DM365, VIN_YIN0_3_EN, 0, 8, 0xf, 0, false)
188 INT_CFG(DM365, INT_EDMA_CC, 2, 1, 1, false)
189 INT_CFG(DM365, INT_EDMA_TC0_ERR, 3, 1, 1, false)
190 INT_CFG(DM365, INT_EDMA_TC1_ERR, 4, 1, 1, false)
191 INT_CFG(DM365, INT_EDMA_TC2_ERR, 22, 1, 1, false)
192 INT_CFG(DM365, INT_EDMA_TC3_ERR, 23, 1, 1, false)
193 INT_CFG(DM365, INT_PRTCSS, 10, 1, 1, false)
194 INT_CFG(DM365, INT_EMAC_RXTHRESH, 14, 1, 1, false)
195 INT_CFG(DM365, INT_EMAC_RXPULSE, 15, 1, 1, false)
196 INT_CFG(DM365, INT_EMAC_TXPULSE, 16, 1, 1, false)
197 INT_CFG(DM365, INT_EMAC_MISCPULSE, 17, 1, 1, false)
198 INT_CFG(DM365, INT_IMX0_ENABLE, 0, 1, 0, false)
199 INT_CFG(DM365, INT_IMX0_DISABLE, 0, 1, 1, false)
200 INT_CFG(DM365, INT_HDVICP_ENABLE, 0, 1, 1, false)
201 INT_CFG(DM365, INT_HDVICP_DISABLE, 0, 1, 0, false)
202 INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false)
203 INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false)
204 INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false)
205 INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false)
207 EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false)
208 EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false)
209 EVT_CFG(DM365, EVT2_VC_TX, 0, 1, 1, false)
210 EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false)