Lines Matching refs:__raw_writel
48 __raw_writel(data, MPMU_WUCRM_PJ); in mmp2_set_wake()
53 __raw_writel(data, MPMU_WUCRM_PJ); in mmp2_set_wake()
64 __raw_writel(0x0, CIU_REG(0x64)); in pm_scu_clk_disable()
65 __raw_writel(0x0, CIU_REG(0x68)); in pm_scu_clk_disable()
70 __raw_writel(val, CIU_REG(0x1c)); in pm_scu_clk_disable()
80 __raw_writel(0x03003003, CIU_REG(0x64)); in pm_scu_clk_enable()
81 __raw_writel(0x00303030, CIU_REG(0x68)); in pm_scu_clk_enable()
86 __raw_writel(val, CIU_REG(0x1c)); in pm_scu_clk_enable()
97 __raw_writel(0x0000a010, MPMU_CGR_PJ); in pm_mpmu_clk_disable()
104 __raw_writel(0xdffefffe, MPMU_CGR_PJ); in pm_mpmu_clk_enable()
107 __raw_writel(val, MPMU_PLL2_CTRL1); in pm_mpmu_clk_enable()
154 __raw_writel(idle_cfg, APMU_PJ_IDLE_CFG); in mmp2_pm_enter_lowpower_mode()
155 __raw_writel(apcr, MPMU_PCR_PJ); /* 0xfe086000 */ in mmp2_pm_enter_lowpower_mode()
170 __raw_writel(temp, APMU_SRAM_PWR_DWN); in mmp2_pm_enter()
230 __raw_writel(0x5, MPMU_SCCR); in mmp2_pm_init()
237 __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8)); in mmp2_pm_init()
243 __raw_writel(apcr, MPMU_PCR_PJ); in mmp2_pm_init()