Lines Matching refs:FShft
143 (((Size) - 1) << FShft (UDCOMP_OUTMAXP))
149 (((Size) - 1) << FShft (UDCIMP_INMAXP))
343 FShft (UTCR1_BRD))
346 FShft (UTCR2_BRD))
351 FShft (UTCR1_BRD))
354 FShft (UTCR2_BRD))
482 FShft (SDCR3_BRD))
485 FShft (SDCR4_BRD))
490 FShft (SDCR3_BRD))
493 FShft (SDCR4_BRD))
643 ((Div)/32 << FShft (MCCR0_ASD))
647 (((Div) + 31)/32 << FShft (MCCR0_ASD))
656 ((Div)/32 << FShft (MCCR0_TSD))
660 (((Div) + 31)/32 << FShft (MCCR0_TSD))
682 (((Div) - 1) << FShft (MCCR0_ECP))
760 (((Size) - 1) << FShft (SSCR0_DSS))
764 (0 << FShft (SSCR0_FRF))
767 (1 << FShft (SSCR0_FRF))
769 (2 << FShft (SSCR0_FRF))
775 (((Div) - 2)/2 << FShft (SSCR0_SCR))
779 (((Div) - 1)/2 << FShft (SSCR0_SCR))
947 (0x00 << FShft (PPCR_CCF))
949 (0x01 << FShft (PPCR_CCF))
951 (0x02 << FShft (PPCR_CCF))
953 (0x03 << FShft (PPCR_CCF))
955 (0x04 << FShft (PPCR_CCF))
957 (0x05 << FShft (PPCR_CCF))
959 (0x06 << FShft (PPCR_CCF))
961 (0x07 << FShft (PPCR_CCF))
963 (0x08 << FShft (PPCR_CCF))
965 (0x09 << FShft (PPCR_CCF))
967 (0x0A << FShft (PPCR_CCF))
969 (0x0B << FShft (PPCR_CCF))
971 (0x0C << FShft (PPCR_CCF))
973 (0x0D << FShft (PPCR_CCF))
975 (0x0E << FShft (PPCR_CCF))
977 (0x0F << FShft (PPCR_CCF))
1061 (0 << FShft (TUCR_TSEL))
1063 (1 << FShft (TUCR_TSEL))
1065 (2 << FShft (TUCR_TSEL))
1067 (3 << FShft (TUCR_TSEL))
1070 (4 << FShft (TUCR_TSEL))
1073 (5 << FShft (TUCR_TSEL))
1075 (6 << FShft (TUCR_TSEL))
1077 (7 << FShft (TUCR_TSEL))
1382 (((Add) - 9) << FShft (MDCNFG_DRAC))
1387 (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP))
1389 (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP))
1392 (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR))
1394 (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR))
1397 ((Tcpu) << FShft (MDCNFG_TDL))
1402 ((Tcpu)/8 << FShft (MDCNFG_DRI))
1456 (0 << FShft (MSC_RT))
1458 (1 << FShft (MSC_RT))
1460 (2 << FShft (MSC_RT))
1462 (3 << FShft (MSC_RT))
1470 ((((Tcpu) - 3)/2) << FShft (MSC_RDF))
1472 ((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1475 ((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1477 ((((Tcpu) - 1)/2) << FShft (MSC_RDF))
1482 ((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1484 ((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1487 ((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1489 ((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1493 (((Tcpu)/4) << FShft (MSC_RRR))
1495 ((((Tcpu) + 3)/4) << FShft (MSC_RRR))
1522 ((((Tcpu) - 2)/2) << FShft (MECR_BSIO))
1524 ((((Tcpu) - 1)/2) << FShft (MECR_BSIO))
1528 ((((Tcpu) - 2)/2) << FShft (MECR_BSA))
1530 ((((Tcpu) - 1)/2) << FShft (MECR_BSA))
1533 ((((Tcpu) - 2)/2) << FShft (MECR_BSM))
1535 ((((Tcpu) - 1)/2) << FShft (MECR_BSM))
1634 (0 << FShft (LCD_PBS))
1636 (1 << FShft (LCD_PBS))
1638 (2 << FShft (LCD_PBS))
1689 ((Tcpu)/2 << FShft (LCCR0_PDD))
1714 (((Pixel) - 16)/16 << FShft (LCCR1_PPL))
1719 (((Tpix) - 1) << FShft (LCCR1_HSW))
1724 (((Tpix) - 1) << FShft (LCCR1_ELW))
1729 (((Tpix) - 1) << FShft (LCCR1_BLW))
1733 (((Line) - 1) << FShft (LCCR2_LPP))
1738 (((Tln) - 1) << FShft (LCCR2_VSW))
1743 ((Tln) << FShft (LCCR2_EFW))
1748 ((Tln) << FShft (LCCR2_BFW))
1755 (((Div) - 4)/2 << FShft (LCCR3_PCD))
1759 (((Div) - 3)/2 << FShft (LCCR3_PCD))
1765 (((Div) - 2)/2 << FShft (LCCR3_ACB))
1769 (((Div) - 1)/2 << FShft (LCCR3_ACB))
1776 (0 << FShft (LCCR3_API))
1779 ((Trans) << FShft (LCCR3_API))