Lines Matching refs:topckgen
58 <&topckgen CLK_TOP_MAINPLL_D2>;
71 <&topckgen CLK_TOP_MAINPLL_D2>;
84 <&topckgen CLK_TOP_MAINPLL_D2>;
97 <&topckgen CLK_TOP_MAINPLL_D2>;
182 topckgen: topckgen@10000000 { label
183 compatible = "mediatek,mt8516-topckgen", "syscon";
218 clocks = <&topckgen CLK_TOP_CLK26M_D2>,
219 <&topckgen CLK_TOP_APXGPT>;
252 clocks = <&topckgen CLK_TOP_PMICWRAP_26M>,
253 <&topckgen CLK_TOP_PMICWRAP_AP>;
295 clocks = <&topckgen CLK_TOP_APDMA>;
305 clocks = <&topckgen CLK_TOP_UART0_SEL>,
306 <&topckgen CLK_TOP_UART0>;
319 clocks = <&topckgen CLK_TOP_UART1_SEL>,
320 <&topckgen CLK_TOP_UART1>;
333 clocks = <&topckgen CLK_TOP_UART2_SEL>,
334 <&topckgen CLK_TOP_UART2>;
348 clocks = <&topckgen CLK_TOP_AHB_INFRA_D2>,
350 <&topckgen CLK_TOP_I2C0>,
351 <&topckgen CLK_TOP_APDMA>;
367 clocks = <&topckgen CLK_TOP_AHB_INFRA_D2>,
369 <&topckgen CLK_TOP_I2C1>,
370 <&topckgen CLK_TOP_APDMA>;
386 clocks = <&topckgen CLK_TOP_AHB_INFRA_D2>,
388 <&topckgen CLK_TOP_I2C2>,
389 <&topckgen CLK_TOP_APDMA>;
406 clocks = <&topckgen CLK_TOP_UNIVPLL_D12>,
407 <&topckgen CLK_TOP_SPI_SEL>,
408 <&topckgen CLK_TOP_SPI>;
417 clocks = <&topckgen CLK_TOP_MSDC0>,
418 <&topckgen CLK_TOP_AHB_INFRA_SEL>,
419 <&topckgen CLK_TOP_MSDC0_INFRA>;
428 clocks = <&topckgen CLK_TOP_MSDC1>,
429 <&topckgen CLK_TOP_AHB_INFRA_SEL>,
430 <&topckgen CLK_TOP_MSDC1_INFRA>;
439 clocks = <&topckgen CLK_TOP_MSDC2>,
440 <&topckgen CLK_TOP_RG_MSDC2>,
441 <&topckgen CLK_TOP_MSDC2_INFRA>;
451 clocks = <&topckgen CLK_TOP_RG_ETH>,
452 <&topckgen CLK_TOP_66M_ETH>,
453 <&topckgen CLK_TOP_133M_ETH>;
462 clocks = <&topckgen CLK_TOP_TRNG>;
471 clocks = <&topckgen CLK_TOP_PWM>,
472 <&topckgen CLK_TOP_PWM_B>,
473 <&topckgen CLK_TOP_PWM1_FB>,
474 <&topckgen CLK_TOP_PWM2_FB>,
475 <&topckgen CLK_TOP_PWM3_FB>,
476 <&topckgen CLK_TOP_PWM4_FB>,
477 <&topckgen CLK_TOP_PWM5_FB>;
488 clocks = <&topckgen CLK_TOP_USB>,
489 <&topckgen CLK_TOP_USBIF>,
490 <&topckgen CLK_TOP_USB_1P>;
501 clocks = <&topckgen CLK_TOP_USB>,
502 <&topckgen CLK_TOP_USBIF>,
503 <&topckgen CLK_TOP_USB_1P>;
520 clocks = <&topckgen CLK_TOP_USB_PHY48M>;
527 clocks = <&topckgen CLK_TOP_USB_PHY48M>;
537 clocks = <&topckgen CLK_TOP_AUX_ADC>;