Lines Matching refs:cpg

8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
174 clocks = <&cpg CPG_MOD 402>;
176 resets = <&cpg 402>;
190 clocks = <&cpg CPG_MOD 912>;
192 resets = <&cpg 912>;
205 clocks = <&cpg CPG_MOD 911>;
207 resets = <&cpg 911>;
220 clocks = <&cpg CPG_MOD 910>;
222 resets = <&cpg 910>;
235 clocks = <&cpg CPG_MOD 909>;
237 resets = <&cpg 909>;
250 clocks = <&cpg CPG_MOD 908>;
252 resets = <&cpg 908>;
265 clocks = <&cpg CPG_MOD 907>;
267 resets = <&cpg 907>;
280 clocks = <&cpg CPG_MOD 906>;
282 resets = <&cpg 906>;
298 clocks = <&cpg CPG_MOD 926>;
300 resets = <&cpg 926>;
312 clocks = <&cpg CPG_MOD 303>;
315 resets = <&cpg 303>;
331 clocks = <&cpg CPG_MOD 302>;
334 resets = <&cpg 302>;
350 clocks = <&cpg CPG_MOD 301>;
353 resets = <&cpg 301>;
369 clocks = <&cpg CPG_MOD 300>;
372 resets = <&cpg 300>;
376 cpg: clock-controller@e6150000 { label
377 compatible = "renesas,r8a77990-cpg-mssr";
403 clocks = <&cpg CPG_MOD 522>;
405 resets = <&cpg 522>;
420 clocks = <&cpg CPG_MOD 407>;
422 resets = <&cpg 407>;
431 clocks = <&cpg CPG_MOD 125>;
434 resets = <&cpg 125>;
444 clocks = <&cpg CPG_MOD 124>;
447 resets = <&cpg 124>;
457 clocks = <&cpg CPG_MOD 123>;
460 resets = <&cpg 123>;
470 clocks = <&cpg CPG_MOD 122>;
473 resets = <&cpg 122>;
483 clocks = <&cpg CPG_MOD 121>;
486 resets = <&cpg 121>;
497 clocks = <&cpg CPG_MOD 931>;
499 resets = <&cpg 931>;
514 clocks = <&cpg CPG_MOD 930>;
516 resets = <&cpg 930>;
531 clocks = <&cpg CPG_MOD 929>;
533 resets = <&cpg 929>;
548 clocks = <&cpg CPG_MOD 928>;
550 resets = <&cpg 928>;
564 clocks = <&cpg CPG_MOD 927>;
566 resets = <&cpg 927>;
580 clocks = <&cpg CPG_MOD 919>;
582 resets = <&cpg 919>;
596 clocks = <&cpg CPG_MOD 918>;
598 resets = <&cpg 918>;
612 clocks = <&cpg CPG_MOD 1003>;
614 resets = <&cpg 1003>;
625 clocks = <&cpg CPG_MOD 520>,
626 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
633 resets = <&cpg 520>;
643 clocks = <&cpg CPG_MOD 519>,
644 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
651 resets = <&cpg 519>;
661 clocks = <&cpg CPG_MOD 518>,
662 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
669 resets = <&cpg 518>;
679 clocks = <&cpg CPG_MOD 517>,
680 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
686 resets = <&cpg 517>;
696 clocks = <&cpg CPG_MOD 516>,
697 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
703 resets = <&cpg 516>;
712 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
720 resets = <&cpg 704>, <&cpg 703>;
731 clocks = <&cpg CPG_MOD 330>;
733 resets = <&cpg 330>;
745 clocks = <&cpg CPG_MOD 331>;
747 resets = <&cpg 331>;
756 clocks = <&cpg CPG_MOD 229>;
757 resets = <&cpg 229>;
787 clocks = <&cpg CPG_MOD 219>;
790 resets = <&cpg 219>;
829 clocks = <&cpg CPG_MOD 218>;
832 resets = <&cpg 218>;
871 clocks = <&cpg CPG_MOD 217>;
874 resets = <&cpg 217>;
1004 clocks = <&cpg CPG_MOD 812>;
1007 resets = <&cpg 812>;
1021 clocks = <&cpg CPG_MOD 916>,
1022 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1025 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1028 resets = <&cpg 916>;
1037 clocks = <&cpg CPG_MOD 915>,
1038 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1041 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1044 resets = <&cpg 915>;
1054 clocks = <&cpg CPG_MOD 914>,
1055 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1058 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1061 resets = <&cpg 914>;
1076 clocks = <&cpg CPG_MOD 523>;
1078 resets = <&cpg 523>;
1086 clocks = <&cpg CPG_MOD 523>;
1088 resets = <&cpg 523>;
1096 clocks = <&cpg CPG_MOD 523>;
1098 resets = <&cpg 523>;
1106 clocks = <&cpg CPG_MOD 523>;
1108 resets = <&cpg 523>;
1116 clocks = <&cpg CPG_MOD 523>;
1118 resets = <&cpg 523>;
1126 clocks = <&cpg CPG_MOD 523>;
1128 resets = <&cpg 523>;
1136 clocks = <&cpg CPG_MOD 523>;
1138 resets = <&cpg 523>;
1148 clocks = <&cpg CPG_MOD 207>,
1149 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1156 resets = <&cpg 207>;
1165 clocks = <&cpg CPG_MOD 206>,
1166 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1173 resets = <&cpg 206>;
1182 clocks = <&cpg CPG_MOD 310>,
1183 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1190 resets = <&cpg 310>;
1199 clocks = <&cpg CPG_MOD 204>,
1200 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1206 resets = <&cpg 204>;
1215 clocks = <&cpg CPG_MOD 203>,
1216 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1222 resets = <&cpg 203>;
1231 clocks = <&cpg CPG_MOD 202>,
1232 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1238 resets = <&cpg 202>;
1247 clocks = <&cpg CPG_MOD 211>;
1252 resets = <&cpg 211>;
1263 clocks = <&cpg CPG_MOD 210>;
1267 resets = <&cpg 210>;
1278 clocks = <&cpg CPG_MOD 209>;
1282 resets = <&cpg 209>;
1293 clocks = <&cpg CPG_MOD 208>;
1297 resets = <&cpg 208>;
1307 clocks = <&cpg CPG_MOD 807>;
1309 resets = <&cpg 807>;
1335 clocks = <&cpg CPG_MOD 806>;
1337 resets = <&cpg 806>;
1364 clocks = <&cpg CPG_MOD 515>;
1369 resets = <&cpg 515>;
1379 clocks = <&cpg CPG_MOD 514>;
1384 resets = <&cpg 514>;
1394 clocks = <&cpg CPG_MOD 513>;
1399 resets = <&cpg 513>;
1409 clocks = <&cpg CPG_MOD 512>;
1414 resets = <&cpg 512>;
1424 clocks = <&cpg CPG_MOD 511>;
1429 resets = <&cpg 511>;
1439 clocks = <&cpg CPG_MOD 510>;
1444 resets = <&cpg 510>;
1454 clocks = <&cpg CPG_MOD 509>;
1459 resets = <&cpg 509>;
1469 clocks = <&cpg CPG_MOD 508>;
1474 resets = <&cpg 508>;
1500 clocks = <&cpg CPG_MOD 1005>,
1501 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1502 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1503 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1504 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1505 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1506 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1507 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1508 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1509 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1510 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1511 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1512 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1513 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1516 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1529 resets = <&cpg 1005>,
1530 <&cpg 1006>, <&cpg 1007>,
1531 <&cpg 1008>, <&cpg 1009>,
1532 <&cpg 1010>, <&cpg 1011>,
1533 <&cpg 1012>, <&cpg 1013>,
1534 <&cpg 1014>, <&cpg 1015>;
1711 clocks = <&cpg CPG_MOD 502>;
1714 resets = <&cpg 502>;
1732 clocks = <&cpg CPG_MOD 328>;
1734 resets = <&cpg 328>;
1743 clocks = <&cpg CPG_MOD 328>;
1745 resets = <&cpg 328>;
1753 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1757 resets = <&cpg 703>, <&cpg 704>;
1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1770 resets = <&cpg 703>, <&cpg 704>;
1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1781 resets = <&cpg 703>, <&cpg 704>;
1791 clocks = <&cpg CPG_MOD 314>;
1794 resets = <&cpg 314>;
1804 clocks = <&cpg CPG_MOD 313>;
1807 resets = <&cpg 313>;
1817 clocks = <&cpg CPG_MOD 311>;
1820 resets = <&cpg 311>;
1836 clocks = <&cpg CPG_MOD 408>;
1839 resets = <&cpg 408>;
1862 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1865 resets = <&cpg 319>;
1873 clocks = <&cpg CPG_MOD 626>;
1875 resets = <&cpg 626>;
1882 clocks = <&cpg CPG_MOD 607>;
1884 resets = <&cpg 607>;
1892 clocks = <&cpg CPG_MOD 631>;
1894 resets = <&cpg 631>;
1901 clocks = <&cpg CPG_MOD 611>;
1903 resets = <&cpg 611>;
1911 clocks = <&cpg CPG_MOD 623>;
1913 resets = <&cpg 623>;
1920 clocks = <&cpg CPG_MOD 603>;
1922 resets = <&cpg 603>;
1930 clocks = <&cpg CPG_MOD 622>;
1932 resets = <&cpg 622>;
1939 clocks = <&cpg CPG_MOD 602>;
1941 resets = <&cpg 602>;
1950 clocks = <&cpg CPG_MOD 711>;
1951 resets = <&cpg 711>;
1959 clocks = <&cpg CPG_MOD 710>;
1960 resets = <&cpg 710>;
1967 clocks = <&cpg CPG_MOD 716>;
1969 resets = <&cpg 716>;
2003 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2005 resets = <&cpg 724>;
2042 clocks = <&cpg CPG_MOD 727>;
2044 resets = <&cpg 727>;
2071 clocks = <&cpg CPG_MOD 727>;
2073 resets = <&cpg 726>;