Lines Matching refs:tmp2
433 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
434 dcache_line_size \tmp1, \tmp2
435 dcache_by_myline_op \op, \domain, \start, \end, \tmp1, \tmp2, \fixup
446 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
447 icache_line_size \tmp1, \tmp2
448 sub \tmp2, \tmp1, #1
449 bic \tmp2, \start, \tmp2
451 ic ivau, \tmp2 // invalidate I line PoU
452 add \tmp2, \tmp2, \tmp1
453 cmp \tmp2, \end
468 .macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2
475 offset_ttbr1 \tmp, \tmp2
650 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
654 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001_MASK
655 and \tmp1, \tmp1, \tmp2
656 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001
657 cmp \tmp1, \tmp2
660 mov_q \tmp2, TCR_CLEAR_FUJITSU_ERRATUM_010001
661 bic \tcr, \tcr, \tmp2
773 .macro cond_yield, lbl:req, tmp:req, tmp2:req
787 get_this_cpu_offset \tmp2
788 ldr w\tmp, [\tmp, \tmp2]