Lines Matching refs:vmcr
463 void __vgic_v3_write_vmcr(u32 vmcr) in __vgic_v3_write_vmcr() argument
465 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_vmcr()
484 static int __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr, in __vgic_v3_highest_priority_lr() argument
500 if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK)) in __vgic_v3_highest_priority_lr()
504 if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK)) in __vgic_v3_highest_priority_lr()
575 static unsigned int __vgic_v3_get_bpr0(u32 vmcr) in __vgic_v3_get_bpr0() argument
577 return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT; in __vgic_v3_get_bpr0()
580 static unsigned int __vgic_v3_get_bpr1(u32 vmcr) in __vgic_v3_get_bpr1() argument
584 if (vmcr & ICH_VMCR_CBPR_MASK) { in __vgic_v3_get_bpr1()
585 bpr = __vgic_v3_get_bpr0(vmcr); in __vgic_v3_get_bpr1()
589 bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT; in __vgic_v3_get_bpr1()
599 static u8 __vgic_v3_pri_to_pre(u8 pri, u32 vmcr, int grp) in __vgic_v3_pri_to_pre() argument
604 bpr = __vgic_v3_get_bpr0(vmcr) + 1; in __vgic_v3_pri_to_pre()
606 bpr = __vgic_v3_get_bpr1(vmcr); in __vgic_v3_pri_to_pre()
617 static void __vgic_v3_set_active_priority(u8 pri, u32 vmcr, int grp) in __vgic_v3_set_active_priority() argument
623 pre = __vgic_v3_pri_to_pre(pri, vmcr, grp); in __vgic_v3_set_active_priority()
674 static void __vgic_v3_read_iar(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_iar() argument
682 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); in __vgic_v3_read_iar()
689 pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT; in __vgic_v3_read_iar()
694 if (__vgic_v3_get_highest_active_priority() <= __vgic_v3_pri_to_pre(lr_prio, vmcr, grp)) in __vgic_v3_read_iar()
700 __vgic_v3_set_active_priority(lr_prio, vmcr, grp); in __vgic_v3_read_iar()
730 static void __vgic_v3_write_dir(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_dir() argument
737 if (!(vmcr & ICH_VMCR_EOIM_MASK)) in __vgic_v3_write_dir()
753 static void __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_eoir() argument
774 if ((vmcr & ICH_VMCR_EOIM_MASK) && !(vid >= VGIC_MIN_LPI)) in __vgic_v3_write_eoir()
781 __vgic_v3_pri_to_pre(lr_prio, vmcr, grp) != act_prio) in __vgic_v3_write_eoir()
788 static void __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_igrpen0() argument
790 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK)); in __vgic_v3_read_igrpen0()
793 static void __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_igrpen1() argument
795 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK)); in __vgic_v3_read_igrpen1()
798 static void __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_igrpen0() argument
803 vmcr |= ICH_VMCR_ENG0_MASK; in __vgic_v3_write_igrpen0()
805 vmcr &= ~ICH_VMCR_ENG0_MASK; in __vgic_v3_write_igrpen0()
807 __vgic_v3_write_vmcr(vmcr); in __vgic_v3_write_igrpen0()
810 static void __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_igrpen1() argument
815 vmcr |= ICH_VMCR_ENG1_MASK; in __vgic_v3_write_igrpen1()
817 vmcr &= ~ICH_VMCR_ENG1_MASK; in __vgic_v3_write_igrpen1()
819 __vgic_v3_write_vmcr(vmcr); in __vgic_v3_write_igrpen1()
822 static void __vgic_v3_read_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_bpr0() argument
824 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr)); in __vgic_v3_read_bpr0()
827 static void __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_bpr1() argument
829 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr)); in __vgic_v3_read_bpr1()
832 static void __vgic_v3_write_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_bpr0() argument
843 vmcr &= ~ICH_VMCR_BPR0_MASK; in __vgic_v3_write_bpr0()
844 vmcr |= val; in __vgic_v3_write_bpr0()
846 __vgic_v3_write_vmcr(vmcr); in __vgic_v3_write_bpr0()
849 static void __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_bpr1() argument
854 if (vmcr & ICH_VMCR_CBPR_MASK) in __vgic_v3_write_bpr1()
863 vmcr &= ~ICH_VMCR_BPR1_MASK; in __vgic_v3_write_bpr1()
864 vmcr |= val; in __vgic_v3_write_bpr1()
866 __vgic_v3_write_vmcr(vmcr); in __vgic_v3_write_bpr1()
892 u32 vmcr, int rt) in __vgic_v3_read_apxr0() argument
898 u32 vmcr, int rt) in __vgic_v3_read_apxr1() argument
903 static void __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_apxr2() argument
908 static void __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_apxr3() argument
913 static void __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_apxr0() argument
918 static void __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_apxr1() argument
923 static void __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_apxr2() argument
928 static void __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_apxr3() argument
933 static void __vgic_v3_read_hppir(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_hppir() argument
940 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val); in __vgic_v3_read_hppir()
952 static void __vgic_v3_read_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_pmr() argument
954 vmcr &= ICH_VMCR_PMR_MASK; in __vgic_v3_read_pmr()
955 vmcr >>= ICH_VMCR_PMR_SHIFT; in __vgic_v3_read_pmr()
956 vcpu_set_reg(vcpu, rt, vmcr); in __vgic_v3_read_pmr()
959 static void __vgic_v3_write_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_pmr() argument
965 vmcr &= ~ICH_VMCR_PMR_MASK; in __vgic_v3_write_pmr()
966 vmcr |= val; in __vgic_v3_write_pmr()
968 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_pmr()
971 static void __vgic_v3_read_rpr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_rpr() argument
977 static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_read_ctlr() argument
989 val |= ((vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT) << ICC_CTLR_EL1_EOImode_SHIFT; in __vgic_v3_read_ctlr()
991 val |= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT; in __vgic_v3_read_ctlr()
996 static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) in __vgic_v3_write_ctlr() argument
1001 vmcr |= ICH_VMCR_CBPR_MASK; in __vgic_v3_write_ctlr()
1003 vmcr &= ~ICH_VMCR_CBPR_MASK; in __vgic_v3_write_ctlr()
1006 vmcr |= ICH_VMCR_EOIM_MASK; in __vgic_v3_write_ctlr()
1008 vmcr &= ~ICH_VMCR_EOIM_MASK; in __vgic_v3_write_ctlr()
1010 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_ctlr()
1017 u32 vmcr; in __vgic_v3_perform_cpuif_access() local
1133 vmcr = __vgic_v3_read_vmcr(); in __vgic_v3_perform_cpuif_access()
1135 fn(vcpu, vmcr, rt); in __vgic_v3_perform_cpuif_access()