Lines Matching refs:rtc
168 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_timer_int() local
172 msr = rtc->msr & 0xc0; in bvme6000_timer_int()
173 rtc->msr = msr | 0x20; /* Ack the interrupt */ in bvme6000_timer_int()
193 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_sched_init() local
194 unsigned char msr = rtc->msr & 0xc0; in bvme6000_sched_init()
196 rtc->msr = 0; /* Ensure timer registers accessible */ in bvme6000_sched_init()
202 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ in bvme6000_sched_init()
203 rtc->t1msb = RTC_TIMER_COUNT >> 8; in bvme6000_sched_init()
204 rtc->t1lsb = RTC_TIMER_COUNT & 0xff; in bvme6000_sched_init()
205 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */ in bvme6000_sched_init()
206 rtc->msr = 0x40; /* Access int.cntrl, etc */ in bvme6000_sched_init()
207 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */ in bvme6000_sched_init()
208 rtc->irr_icr1 = 0; in bvme6000_sched_init()
209 rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */ in bvme6000_sched_init()
210 rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */ in bvme6000_sched_init()
211 rtc->msr = 0; /* Access timer 1 control */ in bvme6000_sched_init()
212 rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */ in bvme6000_sched_init()
214 rtc->msr = msr; in bvme6000_sched_init()
234 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_read_clk() local
242 msr = rtc->msr & 0xc0; in bvme6000_read_clk()
243 rtc->msr = 0; /* Ensure timer registers accessible */ in bvme6000_read_clk()
247 t1int = rtc->msr & 0x20; in bvme6000_read_clk()
249 rtc->t1cr_omr |= 0x40; /* Latch timer1 */ in bvme6000_read_clk()
250 msb = rtc->t1msb; /* Read timer1 */ in bvme6000_read_clk()
251 v = (msb << 8) | rtc->t1lsb; /* Read timer1 */ in bvme6000_read_clk()
252 } while (t1int != (rtc->msr & 0x20) || in bvme6000_read_clk()
262 rtc->msr = msr; in bvme6000_read_clk()
288 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_hwclk() local
289 unsigned char msr = rtc->msr & 0xc0; in bvme6000_hwclk()
291 rtc->msr = 0x40; /* Ensure clock and real-time-mode-register in bvme6000_hwclk()
295 rtc->t0cr_rtmr = t->tm_year%4; in bvme6000_hwclk()
296 rtc->bcd_tenms = 0; in bvme6000_hwclk()
297 rtc->bcd_sec = bin2bcd(t->tm_sec); in bvme6000_hwclk()
298 rtc->bcd_min = bin2bcd(t->tm_min); in bvme6000_hwclk()
299 rtc->bcd_hr = bin2bcd(t->tm_hour); in bvme6000_hwclk()
300 rtc->bcd_dom = bin2bcd(t->tm_mday); in bvme6000_hwclk()
301 rtc->bcd_mth = bin2bcd(t->tm_mon + 1); in bvme6000_hwclk()
302 rtc->bcd_year = bin2bcd(t->tm_year%100); in bvme6000_hwclk()
304 rtc->bcd_dow = bin2bcd(t->tm_wday+1); in bvme6000_hwclk()
305 rtc->t0cr_rtmr = t->tm_year%4 | 0x08; in bvme6000_hwclk()
310 t->tm_sec = bcd2bin(rtc->bcd_sec); in bvme6000_hwclk()
311 t->tm_min = bcd2bin(rtc->bcd_min); in bvme6000_hwclk()
312 t->tm_hour = bcd2bin(rtc->bcd_hr); in bvme6000_hwclk()
313 t->tm_mday = bcd2bin(rtc->bcd_dom); in bvme6000_hwclk()
314 t->tm_mon = bcd2bin(rtc->bcd_mth)-1; in bvme6000_hwclk()
315 t->tm_year = bcd2bin(rtc->bcd_year); in bvme6000_hwclk()
318 t->tm_wday = bcd2bin(rtc->bcd_dow)-1; in bvme6000_hwclk()
319 } while (t->tm_sec != bcd2bin(rtc->bcd_sec)); in bvme6000_hwclk()
322 rtc->msr = msr; in bvme6000_hwclk()