Lines Matching refs:postdiv

238 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
309 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
315 cpu_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
317 cpu_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
319 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
325 ddr_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
327 ddr_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
329 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
335 ahb_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
337 ahb_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
356 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca953x_clocks_init() local
398 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca953x_clocks_init()
404 cpu_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
406 cpu_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
408 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca953x_clocks_init()
414 ddr_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
416 ddr_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
418 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca953x_clocks_init()
424 ahb_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
426 ahb_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
439 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca955x_clocks_init() local
481 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca955x_clocks_init()
487 cpu_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
489 cpu_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
491 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca955x_clocks_init()
497 ddr_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
499 ddr_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
501 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca955x_clocks_init()
507 ahb_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
509 ahb_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
522 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; in qca956x_clocks_init() local
583 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca956x_clocks_init()
589 cpu_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
591 cpu_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()
593 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca956x_clocks_init()
599 ddr_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()
601 ddr_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
603 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca956x_clocks_init()
609 ahb_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
611 ahb_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()