Lines Matching refs:ref_rate
95 unsigned long ref_rate; in ar71xx_clocks_init() local
103 ref_rate = ath79_setup_ref_clk(AR71XX_BASE_FREQ); in ar71xx_clocks_init()
108 freq = div * ref_rate; in ar71xx_clocks_init()
146 unsigned long ref_rate; in ar933x_clocks_init() local
159 ref_rate = (40 * 1000 * 1000); in ar933x_clocks_init()
161 ref_rate = (25 * 1000 * 1000); in ar933x_clocks_init()
163 ath79_setup_ref_clk(ref_rate); in ar933x_clocks_init()
234 unsigned long ref_rate; in ar934x_clocks_init() local
247 ref_rate = 40 * 1000 * 1000; in ar934x_clocks_init()
249 ref_rate = 25 * 1000 * 1000; in ar934x_clocks_init()
251 ref_rate = ath79_setup_ref_clk(ref_rate); in ar934x_clocks_init()
277 cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, in ar934x_clocks_init()
304 ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, in ar934x_clocks_init()
313 cpu_rate = ref_rate; in ar934x_clocks_init()
323 ddr_rate = ref_rate; in ar934x_clocks_init()
333 ahb_rate = ref_rate; in ar934x_clocks_init()
352 unsigned long ref_rate; in qca953x_clocks_init() local
362 ref_rate = 40 * 1000 * 1000; in qca953x_clocks_init()
364 ref_rate = 25 * 1000 * 1000; in qca953x_clocks_init()
366 ref_rate = ath79_setup_ref_clk(ref_rate); in qca953x_clocks_init()
378 cpu_pll = nint * ref_rate / ref_div; in qca953x_clocks_init()
379 cpu_pll += frac * (ref_rate >> 6) / ref_div; in qca953x_clocks_init()
392 ddr_pll = nint * ref_rate / ref_div; in qca953x_clocks_init()
393 ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); in qca953x_clocks_init()
402 cpu_rate = ref_rate; in qca953x_clocks_init()
412 ddr_rate = ref_rate; in qca953x_clocks_init()
422 ahb_rate = ref_rate; in qca953x_clocks_init()
435 unsigned long ref_rate; in qca955x_clocks_init() local
445 ref_rate = 40 * 1000 * 1000; in qca955x_clocks_init()
447 ref_rate = 25 * 1000 * 1000; in qca955x_clocks_init()
449 ref_rate = ath79_setup_ref_clk(ref_rate); in qca955x_clocks_init()
461 cpu_pll = nint * ref_rate / ref_div; in qca955x_clocks_init()
462 cpu_pll += frac * ref_rate / (ref_div * (1 << 6)); in qca955x_clocks_init()
475 ddr_pll = nint * ref_rate / ref_div; in qca955x_clocks_init()
476 ddr_pll += frac * ref_rate / (ref_div * (1 << 10)); in qca955x_clocks_init()
485 cpu_rate = ref_rate; in qca955x_clocks_init()
495 ddr_rate = ref_rate; in qca955x_clocks_init()
505 ahb_rate = ref_rate; in qca955x_clocks_init()
518 unsigned long ref_rate; in qca956x_clocks_init() local
538 ref_rate = 40 * 1000 * 1000; in qca956x_clocks_init()
540 ref_rate = 25 * 1000 * 1000; in qca956x_clocks_init()
542 ref_rate = ath79_setup_ref_clk(ref_rate); in qca956x_clocks_init()
558 cpu_pll = nint * ref_rate / ref_div; in qca956x_clocks_init()
559 cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); in qca956x_clocks_init()
560 cpu_pll += (hfrac >> 13) * ref_rate / ref_div; in qca956x_clocks_init()
576 ddr_pll = nint * ref_rate / ref_div; in qca956x_clocks_init()
577 ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); in qca956x_clocks_init()
578 ddr_pll += (hfrac >> 13) * ref_rate / ref_div; in qca956x_clocks_init()
587 cpu_rate = ref_rate; in qca956x_clocks_init()
597 ddr_rate = ref_rate; in qca956x_clocks_init()
607 ahb_rate = ref_rate; in qca956x_clocks_init()