Lines Matching refs:interrupt
30 cpu_intc: interrupt-controller {
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
35 #interrupt-cells = <1>;
59 periph_intc: interrupt-controller@411400 {
63 interrupt-controller;
64 #interrupt-cells = <1>;
66 interrupt-parent = <&cpu_intc>;
70 sun_l2_intc: interrupt-controller@403000 {
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 interrupt-parent = <&periph_intc>;
83 interrupt-parent = <&sun_l2_intc>;
91 upg_irq0_intc: interrupt-controller@406780 {
98 interrupt-controller;
99 #interrupt-cells = <1>;
101 interrupt-parent = <&periph_intc>;
103 interrupt-names = "upg_main", "upg_bsc";
106 upg_aon_irq0_intc: interrupt-controller@408b80 {
114 interrupt-controller;
115 #interrupt-cells = <1>;
117 interrupt-parent = <&periph_intc>;
119 interrupt-names = "upg_main_aon", "upg_bsc_aon",
140 interrupt-parent = <&periph_intc>;
152 interrupt-parent = <&periph_intc>;
164 interrupt-parent = <&periph_intc>;
173 interrupt-parent = <&upg_irq0_intc>;
176 interrupt-names = "upg_bsca";
183 interrupt-parent = <&upg_irq0_intc>;
186 interrupt-names = "upg_bscb";
193 interrupt-parent = <&upg_irq0_intc>;
196 interrupt-names = "upg_bscc";
203 interrupt-parent = <&upg_irq0_intc>;
206 interrupt-names = "upg_bscd";
213 interrupt-parent = <&upg_aon_irq0_intc>;
216 interrupt-names = "upg_bsce";
243 aon_pm_l2_intc: interrupt-controller@408440 {
246 interrupt-controller;
247 #interrupt-cells = <1>;
248 interrupt-parent = <&periph_intc>;
268 #interrupt-cells = <2>;
270 interrupt-controller;
271 interrupt-parent = <&upg_irq0_intc>;
280 #interrupt-cells = <2>;
282 interrupt-controller;
283 interrupt-parent = <&upg_aon_irq0_intc>;
300 interrupt-parent = <&periph_intc>;
322 interrupt-parent = <&periph_intc>;
332 interrupt-parent = <&periph_intc>;
341 interrupt-parent = <&periph_intc>;
351 interrupt-parent = <&periph_intc>;
360 interrupt-parent = <&periph_intc>;
370 interrupt-parent = <&periph_intc>;
379 interrupt-parent = <&periph_intc>;
389 interrupt-parent = <&periph_intc>;
394 hif_l2_intc: interrupt-controller@411000 {
397 interrupt-controller;
398 #interrupt-cells = <1>;
399 interrupt-parent = <&periph_intc>;
409 interrupt-parent = <&hif_l2_intc>;
418 interrupt-parent = <&periph_intc>;
457 interrupt-parent = <&periph_intc>;
462 spi_l2_intc: interrupt-controller@411d00 {
465 interrupt-controller;
466 #interrupt-cells = <1>;
467 interrupt-parent = <&periph_intc>;
480 interrupt-parent = <&spi_l2_intc>;
481 interrupt-names = "spi_lr_fullness_reached",
500 interrupt-parent = <&upg_aon_irq0_intc>;
501 interrupt-names = "mspi_done";
509 interrupt-parent = <&aon_pm_l2_intc>;
510 interrupt-names = "timer";