Lines Matching refs:r4
62 PPC_STL r1, VCPU_GPR(R1)(r4)
63 PPC_STL r2, VCPU_GPR(R2)(r4)
64 PPC_LL r1, VCPU_HOST_STACK(r4)
72 lwz r8, VCPU_HOST_PID(r4)
73 PPC_LL r11, VCPU_SHARED(r4)
74 PPC_STL r14, VCPU_GPR(R14)(r4) /* We need a non-volatile GPR. */
77 stw r10, VCPU_GUEST_PID(r4)
86 stw r8, VCPU_TIMING_EXIT_TBL(r4)
88 stw r9, VCPU_TIMING_EXIT_TBU(r4)
94 PPC_STL r5, VCPU_PC(r4)
116 PPC_STL r15, VCPU_GPR(R15)(r4)
117 PPC_STL r16, VCPU_GPR(R16)(r4)
118 PPC_STL r17, VCPU_GPR(R17)(r4)
119 PPC_STL r18, VCPU_GPR(R18)(r4)
120 PPC_STL r19, VCPU_GPR(R19)(r4)
121 PPC_STL r20, VCPU_GPR(R20)(r4)
122 PPC_STL r21, VCPU_GPR(R21)(r4)
123 PPC_STL r22, VCPU_GPR(R22)(r4)
124 PPC_STL r23, VCPU_GPR(R23)(r4)
125 PPC_STL r24, VCPU_GPR(R24)(r4)
126 PPC_STL r25, VCPU_GPR(R25)(r4)
127 PPC_STL r26, VCPU_GPR(R26)(r4)
128 PPC_STL r27, VCPU_GPR(R27)(r4)
129 PPC_STL r28, VCPU_GPR(R28)(r4)
130 PPC_STL r29, VCPU_GPR(R29)(r4)
131 PPC_STL r30, VCPU_GPR(R30)(r4)
132 PPC_STL r31, VCPU_GPR(R31)(r4)
142 stw r9, VCPU_LAST_INST(r4)
147 PPC_STL r8, VCPU_FAULT_ESR(r4)
152 PPC_STL r9, VCPU_FAULT_DEAR(r4)
172 mr r11, r4
176 PPC_LL r4, PACACURRENT(r13)
177 PPC_LL r4, (THREAD + THREAD_KVM_VCPU)(r4)
178 PPC_STL r10, VCPU_CR(r4)
179 PPC_STL r11, VCPU_GPR(R4)(r4)
180 PPC_STL r5, VCPU_GPR(R5)(r4)
181 PPC_STL r6, VCPU_GPR(R6)(r4)
182 PPC_STL r8, VCPU_GPR(R8)(r4)
183 PPC_STL r9, VCPU_GPR(R9)(r4)
194 PPC_STL r5, VCPU_GPR(R13)(r4)
195 PPC_STL r3, VCPU_GPR(R3)(r4)
196 PPC_STL r7, VCPU_GPR(R7)(r4)
197 PPC_STL r12, VCPU_GPR(R12)(r4)
198 PPC_STL r6, VCPU_GPR(R10)(r4)
199 PPC_STL r8, VCPU_GPR(R11)(r4)
201 PPC_STL r5, VCPU_CTR(r4)
285 PPC_STL r4, VCPU_GPR(R4)(r11)
286 PPC_LL r4, THREAD_NORMSAVE(0)(r10)
293 PPC_STL r4, VCPU_GPR(R11)(r11)
302 mr r4, r11
312 PPC_STL r4, VCPU_GPR(R4)(r11)
313 PPC_LL r4, GPR9(r8)
320 PPC_STL r4, VCPU_GPR(R9)(r11)
322 PPC_LL r4, GPR11(r8)
328 PPC_STL r4, VCPU_GPR(R11)(r11)
330 mr r4, r11
379 PPC_STL r0, VCPU_GPR(R0)(r4)
382 PPC_STL r5, VCPU_LR(r4)
384 stw r3, VCPU_VRSAVE(r4)
396 PPC_STD(r5, VCPU_SPRG9, r4)
403 PPC_STL r3, VCPU_XER(r4)
415 lwz r6, VCPU_HOST_MAS4(r4)
417 lwz r8, VCPU_HOST_MAS6(r4)
437 mr r3, r4
439 mr r14, r4 /* Save vcpu pointer. */
440 mr r4, r5
444 mr r4, r14
445 PPC_LL r14, VCPU_GPR(R14)(r4)
449 PPC_LL r15, VCPU_GPR(R15)(r4)
450 PPC_LL r16, VCPU_GPR(R16)(r4)
451 PPC_LL r17, VCPU_GPR(R17)(r4)
452 PPC_LL r18, VCPU_GPR(R18)(r4)
453 PPC_LL r19, VCPU_GPR(R19)(r4)
454 PPC_LL r20, VCPU_GPR(R20)(r4)
455 PPC_LL r21, VCPU_GPR(R21)(r4)
456 PPC_LL r22, VCPU_GPR(R22)(r4)
457 PPC_LL r23, VCPU_GPR(R23)(r4)
458 PPC_LL r24, VCPU_GPR(R24)(r4)
459 PPC_LL r25, VCPU_GPR(R25)(r4)
460 PPC_LL r26, VCPU_GPR(R26)(r4)
461 PPC_LL r27, VCPU_GPR(R27)(r4)
462 PPC_LL r28, VCPU_GPR(R28)(r4)
463 PPC_LL r29, VCPU_GPR(R29)(r4)
464 PPC_LL r30, VCPU_GPR(R30)(r4)
465 PPC_LL r31, VCPU_GPR(R31)(r4)
483 PPC_STL r15, VCPU_GPR(R15)(r4)
484 PPC_STL r16, VCPU_GPR(R16)(r4)
485 PPC_STL r17, VCPU_GPR(R17)(r4)
486 PPC_STL r18, VCPU_GPR(R18)(r4)
487 PPC_STL r19, VCPU_GPR(R19)(r4)
488 PPC_STL r20, VCPU_GPR(R20)(r4)
489 PPC_STL r21, VCPU_GPR(R21)(r4)
490 PPC_STL r22, VCPU_GPR(R22)(r4)
491 PPC_STL r23, VCPU_GPR(R23)(r4)
492 PPC_STL r24, VCPU_GPR(R24)(r4)
493 PPC_STL r25, VCPU_GPR(R25)(r4)
494 PPC_STL r26, VCPU_GPR(R26)(r4)
495 PPC_STL r27, VCPU_GPR(R27)(r4)
496 PPC_STL r28, VCPU_GPR(R28)(r4)
497 PPC_STL r29, VCPU_GPR(R29)(r4)
498 PPC_STL r30, VCPU_GPR(R30)(r4)
499 PPC_STL r31, VCPU_GPR(R31)(r4)
536 mr r4, r3
564 PPC_LL r14, VCPU_GPR(R14)(r4)
565 PPC_LL r15, VCPU_GPR(R15)(r4)
566 PPC_LL r16, VCPU_GPR(R16)(r4)
567 PPC_LL r17, VCPU_GPR(R17)(r4)
568 PPC_LL r18, VCPU_GPR(R18)(r4)
569 PPC_LL r19, VCPU_GPR(R19)(r4)
570 PPC_LL r20, VCPU_GPR(R20)(r4)
571 PPC_LL r21, VCPU_GPR(R21)(r4)
572 PPC_LL r22, VCPU_GPR(R22)(r4)
573 PPC_LL r23, VCPU_GPR(R23)(r4)
574 PPC_LL r24, VCPU_GPR(R24)(r4)
575 PPC_LL r25, VCPU_GPR(R25)(r4)
576 PPC_LL r26, VCPU_GPR(R26)(r4)
577 PPC_LL r27, VCPU_GPR(R27)(r4)
578 PPC_LL r28, VCPU_GPR(R28)(r4)
579 PPC_LL r29, VCPU_GPR(R29)(r4)
580 PPC_LL r30, VCPU_GPR(R30)(r4)
581 PPC_LL r31, VCPU_GPR(R31)(r4)
588 stw r3, VCPU_HOST_PID(r4)
589 lwz r3, VCPU_GUEST_PID(r4)
592 PPC_LL r11, VCPU_SHARED(r4)
600 stw r3, VCPU_HOST_MAS4(r4)
602 stw r3, VCPU_HOST_MAS6(r4)
622 lwz r3, VCPU_VRSAVE(r4)
631 PPC_LD(r5, VCPU_SPRG9, r4)
636 PPC_LL r3, VCPU_LR(r4)
637 PPC_LL r5, VCPU_XER(r4)
638 PPC_LL r6, VCPU_CTR(r4)
639 PPC_LL r7, VCPU_CR(r4)
640 PPC_LL r8, VCPU_PC(r4)
642 PPC_LL r0, VCPU_GPR(R0)(r4)
643 PPC_LL r1, VCPU_GPR(R1)(r4)
644 PPC_LL r2, VCPU_GPR(R2)(r4)
645 PPC_LL r10, VCPU_GPR(R10)(r4)
646 PPC_LL r11, VCPU_GPR(R11)(r4)
647 PPC_LL r12, VCPU_GPR(R12)(r4)
648 PPC_LL r13, VCPU_GPR(R13)(r4)
662 stw r9, VCPU_TIMING_LAST_ENTER_TBL(r4)
664 stw r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
674 PPC_LL r5, VCPU_GPR(R5)(r4)
675 PPC_LL r6, VCPU_GPR(R6)(r4)
676 PPC_LL r7, VCPU_GPR(R7)(r4)
677 PPC_LL r8, VCPU_GPR(R8)(r4)
678 PPC_LL r9, VCPU_GPR(R9)(r4)
680 PPC_LL r3, VCPU_GPR(R3)(r4)
681 PPC_LL r4, VCPU_GPR(R4)(r4)