Lines Matching refs:C
249 #define C(x) PERF_COUNT_HW_CACHE_##x macro
256 static u64 power8_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
257 [ C(L1D) ] = {
258 [ C(OP_READ) ] = {
259 [ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
260 [ C(RESULT_MISS) ] = PM_LD_MISS_L1,
262 [ C(OP_WRITE) ] = {
263 [ C(RESULT_ACCESS) ] = 0,
264 [ C(RESULT_MISS) ] = PM_ST_MISS_L1,
266 [ C(OP_PREFETCH) ] = {
267 [ C(RESULT_ACCESS) ] = PM_L1_PREF,
268 [ C(RESULT_MISS) ] = 0,
271 [ C(L1I) ] = {
272 [ C(OP_READ) ] = {
273 [ C(RESULT_ACCESS) ] = PM_INST_FROM_L1,
274 [ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS,
276 [ C(OP_WRITE) ] = {
277 [ C(RESULT_ACCESS) ] = PM_L1_DEMAND_WRITE,
278 [ C(RESULT_MISS) ] = -1,
280 [ C(OP_PREFETCH) ] = {
281 [ C(RESULT_ACCESS) ] = PM_IC_PREF_WRITE,
282 [ C(RESULT_MISS) ] = 0,
285 [ C(LL) ] = {
286 [ C(OP_READ) ] = {
287 [ C(RESULT_ACCESS) ] = PM_DATA_FROM_L3,
288 [ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
290 [ C(OP_WRITE) ] = {
291 [ C(RESULT_ACCESS) ] = PM_L2_ST,
292 [ C(RESULT_MISS) ] = PM_L2_ST_MISS,
294 [ C(OP_PREFETCH) ] = {
295 [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
296 [ C(RESULT_MISS) ] = 0,
299 [ C(DTLB) ] = {
300 [ C(OP_READ) ] = {
301 [ C(RESULT_ACCESS) ] = 0,
302 [ C(RESULT_MISS) ] = PM_DTLB_MISS,
304 [ C(OP_WRITE) ] = {
305 [ C(RESULT_ACCESS) ] = -1,
306 [ C(RESULT_MISS) ] = -1,
308 [ C(OP_PREFETCH) ] = {
309 [ C(RESULT_ACCESS) ] = -1,
310 [ C(RESULT_MISS) ] = -1,
313 [ C(ITLB) ] = {
314 [ C(OP_READ) ] = {
315 [ C(RESULT_ACCESS) ] = 0,
316 [ C(RESULT_MISS) ] = PM_ITLB_MISS,
318 [ C(OP_WRITE) ] = {
319 [ C(RESULT_ACCESS) ] = -1,
320 [ C(RESULT_MISS) ] = -1,
322 [ C(OP_PREFETCH) ] = {
323 [ C(RESULT_ACCESS) ] = -1,
324 [ C(RESULT_MISS) ] = -1,
327 [ C(BPU) ] = {
328 [ C(OP_READ) ] = {
329 [ C(RESULT_ACCESS) ] = PM_BRU_FIN,
330 [ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
332 [ C(OP_WRITE) ] = {
333 [ C(RESULT_ACCESS) ] = -1,
334 [ C(RESULT_MISS) ] = -1,
336 [ C(OP_PREFETCH) ] = {
337 [ C(RESULT_ACCESS) ] = -1,
338 [ C(RESULT_MISS) ] = -1,
341 [ C(NODE) ] = {
342 [ C(OP_READ) ] = {
343 [ C(RESULT_ACCESS) ] = -1,
344 [ C(RESULT_MISS) ] = -1,
346 [ C(OP_WRITE) ] = {
347 [ C(RESULT_ACCESS) ] = -1,
348 [ C(RESULT_MISS) ] = -1,
350 [ C(OP_PREFETCH) ] = {
351 [ C(RESULT_ACCESS) ] = -1,
352 [ C(RESULT_MISS) ] = -1,
357 #undef C