Lines Matching refs:mfdcri
673 val = mfdcri(SDR0, port->sdr_base + sdr_offset); in ppc4xx_pciex_wait_on_sdr()
735 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { in ppc440spe_pciex_check_reset()
748 valPE0 = mfdcri(SDR0, PESDR0_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
749 valPE1 = mfdcri(SDR0, PESDR1_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
750 valPE2 = mfdcri(SDR0, PESDR2_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
815 if (!(mfdcri(SDR0, PESDR0_PLLLCT2) & 0x10000)) { in ppc440spe_pciex_core_init()
818 mfdcri(SDR0, PESDR0_PLLLCT2)); in ppc440spe_pciex_core_init()
827 if (!(mfdcri(SDR0, PESDR0_PLLLCT3) & 0x10000000)) { in ppc440spe_pciex_core_init()
997 mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | in ppc460ex_pciex_init_port_hw()
1004 while (!(mfdcri(SDR0, PESDR0_460EX_RSTSTA) & 0x1)) in ppc460ex_pciex_init_port_hw()
1008 while (!(mfdcri(SDR0, PESDR1_460EX_RSTSTA) & 0x1)) in ppc460ex_pciex_init_port_hw()
1014 (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & in ppc460ex_pciex_init_port_hw()
1093 mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | in apm821xx_pciex_init_port_hw()
1103 (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & in apm821xx_pciex_init_port_hw()
1195 if (((mfdcri(SDR0, PESDR1_460SX_HSSCTLSET) & 0x00000001) == in ppc460sx_pciex_core_init()
1290 while (!(mfdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSTA) & 0x00001000)) in ppc405ex_pcie_phy_reset()
1321 val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); in ppc405ex_pciex_init_port_hw()