Lines Matching refs:tifn
511 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
517 msr |= ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
522 if (tifn & _TIF_SSBD) { in amd_set_core_ssb_state()
550 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
552 u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
558 static __always_inline void amd_set_ssb_virt_state(unsigned long tifn) in amd_set_ssb_virt_state() argument
564 wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn)); in amd_set_ssb_virt_state()
574 unsigned long tifn) in __speculation_ctrl_update() argument
576 unsigned long tif_diff = tifp ^ tifn; in __speculation_ctrl_update()
585 amd_set_ssb_virt_state(tifn); in __speculation_ctrl_update()
588 amd_set_core_ssb_state(tifn); in __speculation_ctrl_update()
592 msr |= ssbd_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
599 msr |= stibp_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
654 unsigned long tifp, tifn; in __switch_to_xtra() local
656 tifn = READ_ONCE(task_thread_info(next_p)->flags); in __switch_to_xtra()
663 if ((tifp & _TIF_BLOCKSTEP || tifn & _TIF_BLOCKSTEP) && in __switch_to_xtra()
669 msk = tifn & _TIF_BLOCKSTEP; in __switch_to_xtra()
674 if ((tifp ^ tifn) & _TIF_NOTSC) in __switch_to_xtra()
677 if ((tifp ^ tifn) & _TIF_NOCPUID) in __switch_to_xtra()
678 set_cpuid_faulting(!!(tifn & _TIF_NOCPUID)); in __switch_to_xtra()
680 if (likely(!((tifp | tifn) & _TIF_SPEC_FORCE_UPDATE))) { in __switch_to_xtra()
681 __speculation_ctrl_update(tifp, tifn); in __switch_to_xtra()
684 tifn = speculation_ctrl_update_tif(next_p); in __switch_to_xtra()
687 __speculation_ctrl_update(~tifn, tifn); in __switch_to_xtra()
690 if ((tifp ^ tifn) & _TIF_SLD) in __switch_to_xtra()
691 switch_to_sld(tifn); in __switch_to_xtra()