Lines Matching refs:WORD_SIZE
9 #define WORD_SIZE (BITS_PER_LONG / 8) macro
11 #define VCPU_RAX __VCPU_REGS_RAX * WORD_SIZE
12 #define VCPU_RCX __VCPU_REGS_RCX * WORD_SIZE
13 #define VCPU_RDX __VCPU_REGS_RDX * WORD_SIZE
14 #define VCPU_RBX __VCPU_REGS_RBX * WORD_SIZE
16 #define VCPU_RBP __VCPU_REGS_RBP * WORD_SIZE
17 #define VCPU_RSI __VCPU_REGS_RSI * WORD_SIZE
18 #define VCPU_RDI __VCPU_REGS_RDI * WORD_SIZE
21 #define VCPU_R8 __VCPU_REGS_R8 * WORD_SIZE
22 #define VCPU_R9 __VCPU_REGS_R9 * WORD_SIZE
23 #define VCPU_R10 __VCPU_REGS_R10 * WORD_SIZE
24 #define VCPU_R11 __VCPU_REGS_R11 * WORD_SIZE
25 #define VCPU_R12 __VCPU_REGS_R12 * WORD_SIZE
26 #define VCPU_R13 __VCPU_REGS_R13 * WORD_SIZE
27 #define VCPU_R14 __VCPU_REGS_R14 * WORD_SIZE
28 #define VCPU_R15 __VCPU_REGS_R15 * WORD_SIZE
128 lea -WORD_SIZE(%_ASM_SP), %_ASM_ARG2
167 mov WORD_SIZE(%_ASM_SP), %_ASM_AX
218 add $WORD_SIZE, %_ASM_SP
266 mov 3*WORD_SIZE(%rbp), %_ASM_ARG2
267 mov 2*WORD_SIZE(%rbp), %_ASM_ARG1
270 push 3*WORD_SIZE(%ebp)
271 push 2*WORD_SIZE(%ebp)
281 _ASM_MOV $0, 3*WORD_SIZE(%_ASM_BP)