Lines Matching refs:a5
168 s32i a5, a2, PT_AREG5
208 l32i a5, a3, 4
211 __src_b a4, a4, a5 # a4 has the instruction
215 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
218 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump
219 addi a6, a5, -OP0_S32I_N
227 .Lstore:movi a5, .Lstore_table # table
229 addx8 a5, a6, a5
230 jx a5 # jump into table
240 l32e a5, a3, -8
243 l32i a5, a3, 0
246 __src_b a3, a5, a6 # a3 has the data word
251 extui a5, a4, INSN_OP0, 4
252 _beqi a5, OP0_L32I_N, 1f # l32i.n: jump
259 extui a5, a4, INSN_OP1, 4
260 _beqi a5, OP1_L32I, 1f # l32i: jump
263 _beqi a5, OP1_L16UI, 1f
264 addi a5, a5, -OP1_L16SI
265 _bnez a5, .Linvalid_instruction_load
276 movi a5, .Lload_table
277 addx8 a4, a4, a5
332 l32i a5, a2, PT_AREG5
353 extui a5, a4, INSN_OP0, 4 # extract OP0
354 addi a5, a5, -OP0_S32I_N
355 _beqz a5, 1f # s32i.n: jump
362 extui a5, a4, INSN_OP1, 4 # extract OP1
363 _beqi a5, OP1_S32I, 1f # jump if 32 bit store
364 _bnei a5, OP1_S16I, .Linvalid_instruction_store
366 movi a5, -1
368 __exth a6, a5 # get 16-bit mask ffffffff:ffff0000
378 movi a5, -1 # mask: ffffffff:XXXX0000
384 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
385 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
387 l32e a5, a4, -8
389 l32i a5, a4, 0 # load lower address word
391 and a5, a5, a8 # mask
393 or a5, a5, a8 # or with original value
395 s32e a5, a4, -8
398 s32i a5, a4, 0 # store
401 __sl a5, a3
403 or a6, a6, a5
440 l32i a5, a2, PT_AREG5
461 l32i a5, a2, PT_AREG5