Lines Matching refs:a7
170 s32i a7, a2, PT_AREG7
203 rsr a7, epc1 # load exception address
205 and a3, a3, a7 # mask lower bits
210 __ssa8 a7
249 addi a7, a7, 2 # increment PC (assume 16-bit insn)
254 addi a7, a7, 1
256 addi a7, a7, 3
330 l32i a7, a2, PT_AREG7
346 1: # a7: instruction pointer, a4: instruction, a3: value
351 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
357 addi a7, a7, 1 # increment PC, 32-bit instruction
359 addi a7, a7, 3 # increment PC, 32-bit instruction
413 bne a7, a4, 1f
417 rsr a7, lbeg # set PC to LBEGIN
421 1: wsr a7, epc1 # skip emulated instruction
438 l32i a7, a2, PT_AREG7
459 l32i a7, a2, PT_AREG7