Lines Matching refs:writel
138 writel(px_cmd, port_mmio + PORT_CMD); in ahci_qoriq_hardreset()
142 writel(px_is, port_mmio + PORT_IRQ_STAT); in ahci_qoriq_hardreset()
180 writel(SATA_ECC_DISABLE, qpriv->ecc_addr); in ahci_qoriq_phy_init()
181 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
182 writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
183 writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
184 writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4); in ahci_qoriq_phy_init()
185 writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5); in ahci_qoriq_phy_init()
186 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
188 writel(AHCI_PORT_AXICC_CFG, in ahci_qoriq_phy_init()
196 writel(readl(qpriv->ecc_addr) | in ahci_qoriq_phy_init()
199 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
200 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
201 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
202 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
204 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
208 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
209 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
210 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
211 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
213 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
220 writel(readl(qpriv->ecc_addr) | in ahci_qoriq_phy_init()
223 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
224 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
225 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
226 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
228 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
237 writel(readl(qpriv->ecc_addr) | in ahci_qoriq_phy_init()
240 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
241 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
242 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
243 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
245 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
249 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
250 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
251 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
252 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
254 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()