Lines Matching refs:gbase
87 static void __iomem *gbase; variable
508 gbase = of_iomap(parent_np, 0); in berlin2_clock_setup()
509 if (!gbase) in berlin2_clock_setup()
526 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_SYSPLLCTL0, in berlin2_clock_setup()
531 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_MEMPLLCTL0, in berlin2_clock_setup()
536 ret = berlin2_pll_register(&bg2_pll_map, gbase + REG_CPUPLLCTL0, in berlin2_clock_setup()
545 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL0, "avpll_vcoA", in berlin2_clock_setup()
551 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL0, in berlin2_clock_setup()
558 ret = berlin2_avpll_vco_register(gbase + REG_AVPLLCTL31, "avpll_vcoB", in berlin2_clock_setup()
565 ret = berlin2_avpll_channel_register(gbase + REG_AVPLLCTL31, in berlin2_clock_setup()
576 0, gbase + REG_CLKSWITCH0, 0, 1, 0, &lock); in berlin2_clock_setup()
584 0, gbase + REG_CLKSWITCH0, 1, 1, 0, &lock); in berlin2_clock_setup()
592 0, gbase + REG_CLKSWITCH0, 2, 1, 0, &lock); in berlin2_clock_setup()
601 0, gbase + REG_CLKSELECT2, 29, 1, 0, &lock); in berlin2_clock_setup()
608 0, gbase + REG_CLKSELECT3, 4, 1, 0, &lock); in berlin2_clock_setup()
615 0, gbase + REG_CLKSELECT3, 6, 1, 0, &lock); in berlin2_clock_setup()
622 0, gbase + REG_CLKSELECT3, 7, 1, 0, &lock); in berlin2_clock_setup()
629 0, gbase + REG_CLKSELECT3, 9, 1, 0, &lock); in berlin2_clock_setup()
636 0, gbase + REG_CLKSELECT3, 10, 1, 0, &lock); in berlin2_clock_setup()
648 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2_clock_setup()
658 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, in berlin2_clock_setup()
681 iounmap(gbase); in berlin2_clock_setup()