Lines Matching refs:ARRAY_SIZE
81 ARRAY_SIZE(hi6220_fixed_rate_clks), clk_data_ao); in hi6220_clk_ao_init()
84 ARRAY_SIZE(hi6220_fixed_factor_clks), clk_data_ao); in hi6220_clk_ao_init()
87 ARRAY_SIZE(hi6220_separated_gate_clks_ao), clk_data_ao); in hi6220_clk_ao_init()
150 …{ HI6220_MMC0_SRC, "mmc0_src", mmc0_src_p, ARRAY_SIZE(mmc0_src_p), CLK_SET_RATE_PARE…
151 …{ HI6220_MMC0_SMP_IN, "mmc0_smp_in", mmc0_sample_in, ARRAY_SIZE(mmc0_sample_in), CLK_SET_RATE_PARE…
152 …{ HI6220_MMC1_SRC, "mmc1_src", mmc1_src_p, ARRAY_SIZE(mmc1_src_p), CLK_SET_RATE_PARE…
153 …{ HI6220_MMC1_SMP_IN, "mmc1_smp_in", mmc1_sample_in, ARRAY_SIZE(mmc1_sample_in), CLK_SET_RATE_PARE…
154 …{ HI6220_MMC2_SRC, "mmc2_src", mmc2_src_p, ARRAY_SIZE(mmc2_src_p), CLK_SET_RATE_PARE…
155 …{ HI6220_MMC2_SMP_IN, "mmc2_smp_in", mmc2_sample_in, ARRAY_SIZE(mmc2_sample_in), CLK_SET_RATE_PARE…
156 …{ HI6220_HIFI_SRC, "hifi_src", hifi_src, ARRAY_SIZE(hifi_src), CLK_SET_RATE_PARE…
157 …{ HI6220_UART1_SRC, "uart1_src", uart1_src, ARRAY_SIZE(uart1_src), CLK_SET_RATE_PARE…
158 …{ HI6220_UART2_SRC, "uart2_src", uart2_src, ARRAY_SIZE(uart2_src), CLK_SET_RATE_PARE…
159 …{ HI6220_UART3_SRC, "uart3_src", uart3_src, ARRAY_SIZE(uart3_src), CLK_SET_RATE_PARE…
160 …{ HI6220_UART4_SRC, "uart4_src", uart4_src, ARRAY_SIZE(uart4_src), CLK_SET_RATE_PARE…
161 …{ HI6220_MMC0_MUX0, "mmc0_mux0", mmc0_mux0_p, ARRAY_SIZE(mmc0_mux0_p), CLK_SET_RATE_PARE…
162 …{ HI6220_MMC1_MUX0, "mmc1_mux0", mmc1_mux0_p, ARRAY_SIZE(mmc1_mux0_p), CLK_SET_RATE_PARE…
163 …{ HI6220_MMC2_MUX0, "mmc2_mux0", mmc2_mux0_p, ARRAY_SIZE(mmc2_mux0_p), CLK_SET_RATE_PARE…
164 …{ HI6220_MMC0_MUX1, "mmc0_mux1", mmc0_mux1_p, ARRAY_SIZE(mmc0_mux1_p), CLK_SET_RATE_PARE…
165 …{ HI6220_MMC1_MUX1, "mmc1_mux1", mmc1_mux1_p, ARRAY_SIZE(mmc1_mux1_p), CLK_SET_RATE_PARE…
166 …{ HI6220_MMC2_MUX1, "mmc2_mux1", mmc2_mux1_p, ARRAY_SIZE(mmc2_mux1_p), CLK_SET_RATE_PARE…
189 ARRAY_SIZE(hi6220_separated_gate_clks_sys), clk_data); in hi6220_clk_sys_init()
192 ARRAY_SIZE(hi6220_mux_clks_sys), clk_data); in hi6220_clk_sys_init()
195 ARRAY_SIZE(hi6220_div_clks_sys), clk_data); in hi6220_clk_sys_init()
222 …{ HI6220_1440_1200, "clk_1440_1200", clk_1440_1200_src, ARRAY_SIZE(clk_1440_1200_src), CLK_SET_RAT…
223 …{ HI6220_1000_1200, "clk_1000_1200", clk_1000_1200_src, ARRAY_SIZE(clk_1000_1200_src), CLK_SET_RAT…
224 …{ HI6220_1000_1440, "clk_1000_1440", clk_1000_1440_src, ARRAY_SIZE(clk_1000_1440_src), CLK_SET_RAT…
246 ARRAY_SIZE(hi6220_separated_gate_clks_media), clk_data); in hi6220_clk_media_init()
249 ARRAY_SIZE(hi6220_mux_clks_media), clk_data); in hi6220_clk_media_init()
252 ARRAY_SIZE(hi6220_div_clks_media), clk_data); in hi6220_clk_media_init()
280 ARRAY_SIZE(hi6220_gate_clks_power), clk_data); in hi6220_clk_power_init()
283 ARRAY_SIZE(hi6220_div_clks_power), clk_data); in hi6220_clk_power_init()
296 int nr = ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks); in hi6220_clk_acpu_init()
303 ARRAY_SIZE(hi6220_acpu_sc_gate_sep_clks), in hi6220_clk_acpu_init()