Lines Matching refs:CGU_CLK_GATE
167 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
184 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
204 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
211 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
218 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
225 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
232 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
239 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
246 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
253 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
260 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
284 "i2s", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
292 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
303 "ssi0", CGU_CLK_GATE,
308 "ssi1", CGU_CLK_GATE,
313 "ssi2", CGU_CLK_GATE,
318 "pcm0", CGU_CLK_GATE,
323 "pcm1", CGU_CLK_GATE,
328 "dma", CGU_CLK_GATE,
333 "i2c0", CGU_CLK_GATE,
338 "i2c1", CGU_CLK_GATE,
343 "i2c2", CGU_CLK_GATE,
348 "uart0", CGU_CLK_GATE,
353 "uart1", CGU_CLK_GATE,
358 "uart2", CGU_CLK_GATE,
363 "uart3", CGU_CLK_GATE,
368 "ipu", CGU_CLK_GATE,
373 "adc", CGU_CLK_GATE,
378 "aic", CGU_CLK_GATE,
383 "aux", CGU_CLK_GATE,
388 "vpu", CGU_CLK_GATE,
393 "mmc0", CGU_CLK_GATE,
398 "mmc1", CGU_CLK_GATE,
403 "mmc2", CGU_CLK_GATE,
408 "usb_phy", CGU_CLK_GATE,