Lines Matching refs:cgu
103 static struct ingenic_cgu *cgu; variable
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
173 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
180 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
186 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_enable()
187 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_enable()
196 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_disable()
197 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_disable()
205 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_is_enabled()
206 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_is_enabled()
226 struct ingenic_cgu *cgu = ingenic_clk->cgu; in jz4780_core1_enable() local
232 spin_lock_irqsave(&cgu->lock, flags); in jz4780_core1_enable()
234 lcr = readl(cgu->base + CGU_REG_LCR); in jz4780_core1_enable()
236 writel(lcr, cgu->base + CGU_REG_LCR); in jz4780_core1_enable()
238 clkgr1 = readl(cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
240 writel(clkgr1, cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
242 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_core1_enable()
245 retval = readl_poll_timeout(cgu->base + CGU_REG_LCR, lcr, in jz4780_core1_enable()
778 cgu = ingenic_cgu_new(jz4780_cgu_clocks, in jz4780_cgu_init()
780 if (!cgu) { in jz4780_cgu_init()
785 retval = ingenic_cgu_register_clocks(cgu); in jz4780_cgu_init()
791 ingenic_cgu_register_syscore_ops(cgu); in jz4780_cgu_init()