Lines Matching refs:zclk
299 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_recalc_rate() local
303 val = readl(zclk->reg) & zclk->mask; in cpg_z_clk_recalc_rate()
304 mult = 32 - (val >> __ffs(zclk->mask)); in cpg_z_clk_recalc_rate()
307 32 * zclk->fixed_div); in cpg_z_clk_recalc_rate()
313 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_determine_rate() local
318 if (rate <= zclk->max_rate) { in cpg_z_clk_determine_rate()
320 prate = zclk->max_rate; in cpg_z_clk_determine_rate()
326 prate * zclk->fixed_div); in cpg_z_clk_determine_rate()
328 prate = req->best_parent_rate / zclk->fixed_div; in cpg_z_clk_determine_rate()
344 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_set_rate() local
348 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, in cpg_z_clk_set_rate()
352 if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK) in cpg_z_clk_set_rate()
355 cpg_reg_modify(zclk->reg, zclk->mask, (32 - mult) << __ffs(zclk->mask)); in cpg_z_clk_set_rate()
361 cpg_reg_modify(zclk->kick_reg, 0, CPG_FRQCRB_KICK); in cpg_z_clk_set_rate()
373 if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK)) in cpg_z_clk_set_rate()
395 struct cpg_z_clk *zclk; in cpg_z_clk_register() local
398 zclk = kzalloc(sizeof(*zclk), GFP_KERNEL); in cpg_z_clk_register()
399 if (!zclk) in cpg_z_clk_register()
408 zclk->reg = reg + CPG_FRQCRC; in cpg_z_clk_register()
409 zclk->kick_reg = reg + CPG_FRQCRB; in cpg_z_clk_register()
410 zclk->hw.init = &init; in cpg_z_clk_register()
411 zclk->mask = GENMASK(offset + 4, offset); in cpg_z_clk_register()
412 zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ in cpg_z_clk_register()
414 clk = clk_register(NULL, &zclk->hw); in cpg_z_clk_register()
416 kfree(zclk); in cpg_z_clk_register()
420 zclk->max_rate = clk_hw_get_rate(clk_hw_get_parent(&zclk->hw)) / in cpg_z_clk_register()
421 zclk->fixed_div; in cpg_z_clk_register()