Lines Matching refs:pll

39 				struct samsung_clk_pll *pll, unsigned long rate)  in samsung_get_pll_settings()  argument
41 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_get_pll_settings()
44 for (i = 0; i < pll->rate_count; i++) { in samsung_get_pll_settings()
55 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll_round_rate() local
56 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_pll_round_rate()
60 for (i = 0; i < pll->rate_count; i++) { in samsung_pll_round_rate()
79 static int samsung_pll_lock_wait(struct samsung_clk_pll *pll, in samsung_pll_lock_wait() argument
99 if (readl_relaxed(pll->con_reg) & reg_mask) in samsung_pll_lock_wait()
106 ret = readl_relaxed_poll_timeout_atomic(pll->con_reg, val, in samsung_pll_lock_wait()
111 pr_err("Could not lock PLL %s\n", clk_hw_get_name(&pll->hw)); in samsung_pll_lock_wait()
118 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll3xxx_enable() local
121 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_enable()
122 tmp |= BIT(pll->enable_offs); in samsung_pll3xxx_enable()
123 writel_relaxed(tmp, pll->con_reg); in samsung_pll3xxx_enable()
125 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll3xxx_enable()
130 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll3xxx_disable() local
133 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_disable()
134 tmp &= ~BIT(pll->enable_offs); in samsung_pll3xxx_disable()
135 writel_relaxed(tmp, pll->con_reg); in samsung_pll3xxx_disable()
152 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2126_recalc_rate() local
156 pll_con = readl_relaxed(pll->con_reg); in samsung_pll2126_recalc_rate()
185 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll3000_recalc_rate() local
189 pll_con = readl_relaxed(pll->con_reg); in samsung_pll3000_recalc_rate()
222 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll35xx_recalc_rate() local
226 pll_con = readl_relaxed(pll->con_reg); in samsung_pll35xx_recalc_rate()
251 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll35xx_set_rate() local
256 rate = samsung_get_pll_settings(pll, drate); in samsung_pll35xx_set_rate()
263 tmp = readl_relaxed(pll->con_reg); in samsung_pll35xx_set_rate()
269 writel_relaxed(tmp, pll->con_reg); in samsung_pll35xx_set_rate()
276 pll->lock_reg); in samsung_pll35xx_set_rate()
285 writel_relaxed(tmp, pll->con_reg); in samsung_pll35xx_set_rate()
288 if (tmp & BIT(pll->enable_offs)) in samsung_pll35xx_set_rate()
289 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll35xx_set_rate()
326 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll36xx_recalc_rate() local
331 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_recalc_rate()
332 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_recalc_rate()
361 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll36xx_set_rate() local
365 rate = samsung_get_pll_settings(pll, drate); in samsung_pll36xx_set_rate()
372 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_set_rate()
373 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_set_rate()
379 writel_relaxed(pll_con0, pll->con_reg); in samsung_pll36xx_set_rate()
385 writel_relaxed(rate->pdiv * PLL36XX_LOCK_FACTOR, pll->lock_reg); in samsung_pll36xx_set_rate()
394 writel_relaxed(pll_con0, pll->con_reg); in samsung_pll36xx_set_rate()
398 writel_relaxed(pll_con1, pll->con_reg + 4); in samsung_pll36xx_set_rate()
400 if (pll_con0 & BIT(pll->enable_offs)) in samsung_pll36xx_set_rate()
401 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll36xx_set_rate()
436 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll0822x_recalc_rate() local
440 pll_con3 = readl_relaxed(pll->con_reg); in samsung_pll0822x_recalc_rate()
455 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll0822x_set_rate() local
459 rate = samsung_get_pll_settings(pll, drate); in samsung_pll0822x_set_rate()
467 pll_con3 = readl_relaxed(pll->con_reg); in samsung_pll0822x_set_rate()
477 pll->lock_reg); in samsung_pll0822x_set_rate()
480 writel_relaxed(pll_con3, pll->con_reg); in samsung_pll0822x_set_rate()
483 if (pll_con3 & BIT(pll->enable_offs)) in samsung_pll0822x_set_rate()
484 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll0822x_set_rate()
521 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll0831x_recalc_rate() local
526 pll_con3 = readl_relaxed(pll->con_reg); in samsung_pll0831x_recalc_rate()
527 pll_con5 = readl_relaxed(pll->con_reg + 8); in samsung_pll0831x_recalc_rate()
544 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll0831x_set_rate() local
548 rate = samsung_get_pll_settings(pll, drate); in samsung_pll0831x_set_rate()
555 pll_con3 = readl_relaxed(pll->con_reg); in samsung_pll0831x_set_rate()
556 pll_con5 = readl_relaxed(pll->con_reg + 8); in samsung_pll0831x_set_rate()
573 writel_relaxed(rate->pdiv * PLL0831X_LOCK_FACTOR, pll->lock_reg); in samsung_pll0831x_set_rate()
576 writel_relaxed(pll_con3, pll->con_reg); in samsung_pll0831x_set_rate()
577 writel_relaxed(pll_con5, pll->con_reg + 8); in samsung_pll0831x_set_rate()
580 if (pll_con3 & BIT(pll->enable_offs)) in samsung_pll0831x_set_rate()
581 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll0831x_set_rate()
619 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll45xx_recalc_rate() local
623 pll_con = readl_relaxed(pll->con_reg); in samsung_pll45xx_recalc_rate()
628 if (pll->type == pll_4508) in samsung_pll45xx_recalc_rate()
653 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll45xx_set_rate() local
658 rate = samsung_get_pll_settings(pll, drate); in samsung_pll45xx_set_rate()
665 con0 = readl_relaxed(pll->con_reg); in samsung_pll45xx_set_rate()
666 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
672 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
686 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
691 switch (pll->type) { in samsung_pll45xx_set_rate()
693 writel_relaxed(rate->pdiv * PLL4502_LOCK_FACTOR, pll->lock_reg); in samsung_pll45xx_set_rate()
696 writel_relaxed(rate->pdiv * PLL4508_LOCK_FACTOR, pll->lock_reg); in samsung_pll45xx_set_rate()
703 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
704 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
707 return samsung_pll_lock_wait(pll, PLL45XX_LOCKED); in samsung_pll45xx_set_rate()
752 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll46xx_recalc_rate() local
756 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll46xx_recalc_rate()
757 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll46xx_recalc_rate()
758 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ? in samsung_pll46xx_recalc_rate()
762 kdiv = pll->type == pll_4650c ? pll_con1 & PLL4650C_KDIV_MASK : in samsung_pll46xx_recalc_rate()
765 shift = ((pll->type == pll_4600) || (pll->type == pll_1460x)) ? 16 : 10; in samsung_pll46xx_recalc_rate()
790 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll46xx_set_rate() local
795 rate = samsung_get_pll_settings(pll, drate); in samsung_pll46xx_set_rate()
802 con0 = readl_relaxed(pll->con_reg); in samsung_pll46xx_set_rate()
803 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
809 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
821 if (pll->type == pll_1460x) { in samsung_pll46xx_set_rate()
838 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
847 writel_relaxed(lock, pll->lock_reg); in samsung_pll46xx_set_rate()
848 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
849 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
852 return samsung_pll_lock_wait(pll, PLL46XX_LOCKED); in samsung_pll46xx_set_rate()
881 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll6552_recalc_rate() local
885 pll_con = readl_relaxed(pll->con_reg); in samsung_pll6552_recalc_rate()
886 if (pll->type == pll_6552_s3c2416) { in samsung_pll6552_recalc_rate()
921 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll6553_recalc_rate() local
925 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll6553_recalc_rate()
926 pll_con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll6553_recalc_rate()
959 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_s3c2410_pll_recalc_rate() local
963 pll_con = readl_relaxed(pll->con_reg); in samsung_s3c2410_pll_recalc_rate()
977 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_s3c2440_mpll_recalc_rate() local
981 pll_con = readl_relaxed(pll->con_reg); in samsung_s3c2440_mpll_recalc_rate()
995 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_s3c2410_pll_set_rate() local
1000 rate = samsung_get_pll_settings(pll, drate); in samsung_s3c2410_pll_set_rate()
1007 tmp = readl_relaxed(pll->con_reg); in samsung_s3c2410_pll_set_rate()
1016 writel_relaxed(tmp, pll->con_reg); in samsung_s3c2410_pll_set_rate()
1026 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_s3c2410_pll_enable() local
1027 u32 pll_en = readl_relaxed(pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); in samsung_s3c2410_pll_enable()
1035 writel_relaxed(pll_en, pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); in samsung_s3c2410_pll_enable()
1122 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2550x_recalc_rate() local
1126 pll_stat = readl_relaxed(pll->con_reg); in samsung_pll2550x_recalc_rate()
1163 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2550xx_recalc_rate() local
1167 pll_con = readl_relaxed(pll->con_reg); in samsung_pll2550xx_recalc_rate()
1191 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2550xx_set_rate() local
1196 rate = samsung_get_pll_settings(pll, drate); in samsung_pll2550xx_set_rate()
1203 tmp = readl_relaxed(pll->con_reg); in samsung_pll2550xx_set_rate()
1209 writel_relaxed(tmp, pll->con_reg); in samsung_pll2550xx_set_rate()
1215 writel_relaxed(rate->pdiv * PLL2550XX_LOCK_FACTOR, pll->lock_reg); in samsung_pll2550xx_set_rate()
1224 writel_relaxed(tmp, pll->con_reg); in samsung_pll2550xx_set_rate()
1227 return samsung_pll_lock_wait(pll, in samsung_pll2550xx_set_rate()
1263 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2650x_recalc_rate() local
1268 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll2650x_recalc_rate()
1273 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll2650x_recalc_rate()
1286 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2650x_set_rate() local
1291 rate = samsung_get_pll_settings(pll, drate); in samsung_pll2650x_set_rate()
1298 con0 = readl_relaxed(pll->con_reg); in samsung_pll2650x_set_rate()
1299 con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll2650x_set_rate()
1302 writel_relaxed(rate->pdiv * PLL2650X_LOCK_FACTOR, pll->lock_reg); in samsung_pll2650x_set_rate()
1312 writel_relaxed(con0, pll->con_reg); in samsung_pll2650x_set_rate()
1316 writel_relaxed(con1, pll->con_reg + 4); in samsung_pll2650x_set_rate()
1319 return samsung_pll_lock_wait(pll, in samsung_pll2650x_set_rate()
1355 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2650xx_recalc_rate() local
1360 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll2650xx_recalc_rate()
1361 pll_con2 = readl_relaxed(pll->con_reg + 8); in samsung_pll2650xx_recalc_rate()
1377 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2650xx_set_rate() local
1381 rate = samsung_get_pll_settings(pll, drate); in samsung_pll2650xx_set_rate()
1388 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll2650xx_set_rate()
1389 pll_con2 = readl_relaxed(pll->con_reg + 8); in samsung_pll2650xx_set_rate()
1406 writel_relaxed(PLL2650XX_LOCK_FACTOR * rate->pdiv, pll->lock_reg); in samsung_pll2650xx_set_rate()
1408 writel_relaxed(pll_con0, pll->con_reg); in samsung_pll2650xx_set_rate()
1409 writel_relaxed(pll_con2, pll->con_reg + 8); in samsung_pll2650xx_set_rate()
1411 return samsung_pll_lock_wait(pll, 0x1 << PLL2650XX_PLL_LOCKTIME_SHIFT); in samsung_pll2650xx_set_rate()
1428 struct samsung_clk_pll *pll; in _samsung_clk_register_pll() local
1432 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in _samsung_clk_register_pll()
1433 if (!pll) { in _samsung_clk_register_pll()
1449 pll->rate_count = len; in _samsung_clk_register_pll()
1450 pll->rate_table = kmemdup(pll_clk->rate_table, in _samsung_clk_register_pll()
1451 pll->rate_count * in _samsung_clk_register_pll()
1454 WARN(!pll->rate_table, in _samsung_clk_register_pll()
1472 pll->enable_offs = PLL35XX_ENABLE_SHIFT; in _samsung_clk_register_pll()
1473 pll->lock_offs = PLL35XX_LOCK_STAT_SHIFT; in _samsung_clk_register_pll()
1474 if (!pll->rate_table) in _samsung_clk_register_pll()
1480 pll->enable_offs = PLL0822X_ENABLE_SHIFT; in _samsung_clk_register_pll()
1481 pll->lock_offs = PLL0822X_LOCK_STAT_SHIFT; in _samsung_clk_register_pll()
1482 if (!pll->rate_table) in _samsung_clk_register_pll()
1492 if (!pll->rate_table) in _samsung_clk_register_pll()
1500 pll->enable_offs = PLL36XX_ENABLE_SHIFT; in _samsung_clk_register_pll()
1501 pll->lock_offs = PLL36XX_LOCK_STAT_SHIFT; in _samsung_clk_register_pll()
1502 if (!pll->rate_table) in _samsung_clk_register_pll()
1508 pll->enable_offs = PLL0831X_ENABLE_SHIFT; in _samsung_clk_register_pll()
1509 pll->lock_offs = PLL0831X_LOCK_STAT_SHIFT; in _samsung_clk_register_pll()
1510 if (!pll->rate_table) in _samsung_clk_register_pll()
1526 if (!pll->rate_table) in _samsung_clk_register_pll()
1532 if (!pll->rate_table) in _samsung_clk_register_pll()
1538 if (!pll->rate_table) in _samsung_clk_register_pll()
1544 if (!pll->rate_table) in _samsung_clk_register_pll()
1553 if (!pll->rate_table) in _samsung_clk_register_pll()
1559 if (!pll->rate_table) in _samsung_clk_register_pll()
1565 if (!pll->rate_table) in _samsung_clk_register_pll()
1575 pll->hw.init = &init; in _samsung_clk_register_pll()
1576 pll->type = pll_clk->type; in _samsung_clk_register_pll()
1577 pll->lock_reg = base + pll_clk->lock_offset; in _samsung_clk_register_pll()
1578 pll->con_reg = base + pll_clk->con_offset; in _samsung_clk_register_pll()
1580 ret = clk_hw_register(ctx->dev, &pll->hw); in _samsung_clk_register_pll()
1584 kfree(pll); in _samsung_clk_register_pll()
1588 samsung_clk_add_lookup(ctx, &pll->hw, pll_clk->id); in _samsung_clk_register_pll()