Lines Matching refs:socfpgaclk

24 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);  in socfpga_gate_clk_recalc_rate()  local
27 if (socfpgaclk->fixed_div) { in socfpga_gate_clk_recalc_rate()
28 div = socfpgaclk->fixed_div; in socfpga_gate_clk_recalc_rate()
29 } else if (socfpgaclk->div_reg) { in socfpga_gate_clk_recalc_rate()
30 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in socfpga_gate_clk_recalc_rate()
31 val &= GENMASK(socfpgaclk->width - 1, 0); in socfpga_gate_clk_recalc_rate()
40 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); in socfpga_dbg_clk_recalc_rate() local
43 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in socfpga_dbg_clk_recalc_rate()
44 val &= GENMASK(socfpgaclk->width - 1, 0); in socfpga_dbg_clk_recalc_rate()
53 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); in socfpga_gate_get_parent() local
58 if (socfpgaclk->bypass_reg) { in socfpga_gate_get_parent()
59 mask = (0x1 << socfpgaclk->bypass_shift); in socfpga_gate_get_parent()
60 parent = ((readl(socfpgaclk->bypass_reg) & mask) >> in socfpga_gate_get_parent()
61 socfpgaclk->bypass_shift); in socfpga_gate_get_parent()
67 second_bypass = readl(socfpgaclk->bypass_reg - in socfpga_gate_get_parent()
83 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); in socfpga_agilex_gate_get_parent() local
88 if (socfpgaclk->bypass_reg) { in socfpga_agilex_gate_get_parent()
89 mask = (0x1 << socfpgaclk->bypass_shift); in socfpga_agilex_gate_get_parent()
90 parent = ((readl(socfpgaclk->bypass_reg) & mask) >> in socfpga_agilex_gate_get_parent()
91 socfpgaclk->bypass_shift); in socfpga_agilex_gate_get_parent()
97 second_bypass = readl(socfpgaclk->bypass_reg - in socfpga_agilex_gate_get_parent()