Lines Matching refs:CLKF_SW_SUP
21 { DM816_USB_OTG_HS_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
26 { DM816_UART1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
27 { DM816_UART2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
28 { DM816_UART3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
29 { DM816_GPIO1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
30 { DM816_GPIO2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
31 { DM816_I2C1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
32 { DM816_I2C2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
33 { DM816_TIMER1_CLKCTRL, NULL, CLKF_SW_SUP, "timer1_fck" },
34 { DM816_TIMER2_CLKCTRL, NULL, CLKF_SW_SUP, "timer2_fck" },
35 { DM816_TIMER3_CLKCTRL, NULL, CLKF_SW_SUP, "timer3_fck" },
36 { DM816_TIMER4_CLKCTRL, NULL, CLKF_SW_SUP, "timer4_fck" },
37 { DM816_TIMER5_CLKCTRL, NULL, CLKF_SW_SUP, "timer5_fck" },
38 { DM816_TIMER6_CLKCTRL, NULL, CLKF_SW_SUP, "timer6_fck" },
39 { DM816_TIMER7_CLKCTRL, NULL, CLKF_SW_SUP, "timer7_fck" },
40 { DM816_WD_TIMER_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" },
41 { DM816_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
42 { DM816_MAILBOX_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
43 { DM816_SPINBOX_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
44 { DM816_MMC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" },
45 { DM816_GPMC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" },
46 { DM816_DAVINCI_MDIO_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk24_ck" },
47 { DM816_EMAC1_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk24_ck" },
48 { DM816_MPU_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk2_ck" },
49 { DM816_RTC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" },
50 { DM816_TPCC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
51 { DM816_TPTC0_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
52 { DM816_TPTC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
53 { DM816_TPTC2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },
54 { DM816_TPTC3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" },