Lines Matching refs:writel_relaxed
79 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
80 writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_next_event()
81 writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_next_event()
92 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_shutdown()
106 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_oneshot()
109 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R | in lpc32xx_clkevt_oneshot()
120 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R, in lpc32xx_clkevt_periodic()
127 writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_periodic()
128 writel_relaxed(ddata->ticks_per_jiffy, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_periodic()
129 writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_periodic()
139 writel_relaxed(LPC32XX_TIMER_IR_MR0INT, ddata->base + LPC32XX_TIMER_IR); in lpc32xx_clock_event_handler()
190 writel_relaxed(LPC32XX_TIMER_TCR_CRST, base + LPC32XX_TIMER_TCR); in lpc32xx_clocksource_init()
191 writel_relaxed(0, base + LPC32XX_TIMER_PR); in lpc32xx_clocksource_init()
192 writel_relaxed(0, base + LPC32XX_TIMER_MCR); in lpc32xx_clocksource_init()
193 writel_relaxed(0, base + LPC32XX_TIMER_CTCR); in lpc32xx_clocksource_init()
194 writel_relaxed(LPC32XX_TIMER_TCR_CEN, base + LPC32XX_TIMER_TCR); in lpc32xx_clocksource_init()
257 writel_relaxed(0, base + LPC32XX_TIMER_TCR); in lpc32xx_clockevent_init()
258 writel_relaxed(0, base + LPC32XX_TIMER_PR); in lpc32xx_clockevent_init()
259 writel_relaxed(0, base + LPC32XX_TIMER_CTCR); in lpc32xx_clockevent_init()
260 writel_relaxed(LPC32XX_TIMER_IR_MR0INT, base + LPC32XX_TIMER_IR); in lpc32xx_clockevent_init()